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Display Subsystem Environment
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CAUTION
•
High full-scale swing is the default mode. Low-swing mode does not comply
with the NTSC and PAL video standards. It must be used only for backward
compatibility to the OMAP3430.
•
All resistor values in
must be within ± 1% tolerance range.
•
cvideo1_out and cvideo2_out are very high-frequency analog signals and
must be routed with extreme care. As a result, the path of these signals
must be as short as possible, and as isolated as possible from other
interfering signals.
•
During board design, the onboard traces and parasites must be matched for
the two channels. cvideo1_vfb and cvideo2_vfb pins are the most sensitive
pins in the TV out system. The onboard parasitic capacitance associated
with these two pins must be less than 0.5 pF. Low onboard resistance is
required for the traces that connect the Rout1/Rout2 to the
cvideo1_vfb/cvideo2_vfb and TV OUT pins (cvideo1_out and cvideo2_out).
The resistance on those trace affects output impedance matching.
Therefore, Rout1 and Rout2 resistors are suggested to be placed as close
as possible to the device pins. The onboard traces lead to the TV OUT pins
must have a characteristic impedance of 75
Ω
starting from the closest
possible place to the device pin output.
•
If the TV output is not used, the following configurations for the AVDACs
pins must be applied:
–
Configuration 1
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cvideo1_out must be grounded.
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cvideo1_vfb must be grounded.
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cvideo2_out must be grounded.
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cvideo2_vfb must be grounded.
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cvideo1_rset must be grounded.
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vdda_dac must be grounded.
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vssa_dac must be grounded.
–
Configuration 2
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cvideo1_out must be floating, left unconnected.
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cvideo1_vfb must be floating, left unconnected.
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cvideo2_out must be floating, left unconnected.
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cvideo2_vfb must be floating, left unconnected.
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cvideo1_rset must be floating, left unconnected.
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vdda_dac must be grounded.
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vssa_dac must be grounded.
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To avoid current leakage, the following bits must be set to 0:
–
DSS.
[5]
DAC_POWERDN_BGZ
–
DSS.
[2:0]
–
PRCM.CM_FCLKEN_DSS[2] EN_TV
–
CONTROL.CONTROL_DEVCONF[18] TVOUTBYPASS
Texas Instruments provides a global solution with a device associated with a TWL50xx power IC. The
power pin vdda_dac is software controlled by the power IC.
7.2.3.1
TV Output and Data Format
The output data to the TV set are the analog composite data from the video DAC stage. The following
video standards are supported:
•
NTSC-J, M
1616
Display Subsystem
SWPU177N – December 2009 – Revised November 2010
Copyright © 2009–2010, Texas Instruments Incorporated
