Texas Instruments OMAP36 Series, Technical Reference Manual

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Even
Odd
Even
Odd
CCDC_SDOFST[14] FIINV = 0x0
CCDC_SDOFST[13:12] FOFST = 0x0
CCDC_SDOFST[8:6] LOFST1 = 0x1
CCDC_SDOFST[11:9] LOFST0 = 0x1
CCDC_SDOFST[5:3] LOFST2 = 0x1
CCDC_SDOFST[2:0] LOFST3 = 0x1
;Non inverse
;+1 line; first line, even field
;+2 lines; even lines, even fields
;+2 lines; odd lines, even fields
;+2 lines; even lines, odd fields
;+2 lines; odd lines, odd fields
Even
Odd
Even
Odd
CCDC_SDOFST[14] FIINV = 0x1
CCDC_SDOFST[13:12] FOFST = 0x0
CCDC_SDOFST[8:6] LOFST1 = 0x5
CCDC_SDOFST[11:9] LOFST0 = 0x5
CCDC_SDOFST[5:3] LOFST2 = 0x5
CCDC_SDOFST[2:0] LOFST3 = 0x5
;inverse
;+1 line; first line, even field
; 2 lines; even lines, even fields
–
; 2 lines; odd lines, even fields
–
; 2 lines; even lines, odd fields
–
; 2 lines; odd lines, odd fields
–
camisp-051
Input image
LINE0
LINE3
LINE2
LINE1
Output image
LINE0
LINE3
LINE2
LINE1
Input image
LINE0
LINE3
LINE2
LINE1
Output image
LINE2
LINE0
LINE1
Public Version
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Camera ISP Functional Description
Figure 6-83 shows an example of sample formats of input and output images.
Figure 6-83. Camera ISP CCDC/Line-Output Control: Sample Formats of Input and Output Images
Output Format
The data bits comprising each pixel are stored in the lower bits of a 16-bit memory word and the unused
bits are zero-filled. The memory data format is shown in
Table 6-38 . The format is determined by the
CCDC_SYN_MODE [10:8] DATSIZ field.
If 8-bit data is input, or if A-Law compression is applied, the data can be packed through the
CCDC_SYN_MODE [11] PACK8 setting so that a pixel occupies only 8 bits.
Data is output to memory only when enabled through the CCDC_SYN_MODE [17] WEN setting. The
pixels are ordered in little-endian format.
1203 SWPU177N – December 2009 – Revised November 2010 Camera Image Signal Processor
Copyright © 2009–2010, Texas Instruments Incorporated