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Category

Debug

Function

DMA may corrupt data in debug mode

Description

When the DMA is enabled and the device is in debug mode, the data written by the DMA 
may be corrupted when a breakpoint is hit or when the debug session is halted.

Workaround

This erratum has been addressed in MSPDebugStack version 3.5.0.1. It is also available 
in released IDE EW430 IAR version 6.30.3 and CCS version 6.1.1 or newer.
If using an earlier version of either IDE or MSPDebugStack, do not halt or use breakpoints 
during a DMA transfer.

Note

This erratum applies to debug mode only.

EEM23

EEM Module

Category

Debug

Function

EEM triggers incorrectly when modules using wait states are enabled

Description

When modules using wait states (USB, MPY, CRC and FRAM controller in manual mode) 
are enabled, the EEM may trigger incorrectly. This can lead to an incorrect profile counter 
value or cause issues with the EEMs data watch point, state storage, and breakpoint 
functionality.

Workaround

None.

Note

This erratum affects debug mode only.

JTAG26

JTAG Module

Category

Debug

Function

LPMx.5 Debug Support Limitations

Description

The JTAG connection to the device might fail at device-dependent low or high supply 
voltage levels if the LPMx.5 debug support feature is enabled. To avoid a potentially 
unreliable debug session or general issues with JTAG device connectivity and the 
resulting bad customer experience Texas Instruments has chosen to remove the LPMx.5 
debug support feature from common MSP430 IDEs including TIs Code Composer Studio 
6.1.0 with msp430.emu updated to version 6.1.0.7 and IARs Embedded Workbench 
6.30.2, which are based on the MSP430 debug stack MSP430.DLL 3.5.0.1 

http://

www.ti.com/tool/MSPDS

TI plans to re-introduce this feature in limited capacity in a future release of the debug 
stack by providing an IDE override option for customers to selectively re-activate LPMx.5 
debug support if needed. Note that the limitations and supply voltage dependencies 
outlined in this erratum will continue to apply.

For additional information on how the LPMx.5 debug support is handled within the 
MSP430 IDEs including possible workarounds on how to debug applications using 
LPMx.5 without toolchain support refer to 

Code Composer Studio User's Guide for 

MSP430 chapter F.4

 and 

IAR Embedded Workbench User's Guide for MSP430 chapter 

2.2.5

.

www.ti.com

Advisory Descriptions

SLAZ507AC – JANUARY 2013 – REVISED MAY 2021

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MSP430F67671 Microcontroller

15

Copyright © 2021 Texas Instruments Incorporated

Summary of Contents for MSP430F67671

Page 1: ...visories 3 4 Fixed by Compiler Advisories 3 5 Nomenclature Package Symbolization and Revision Identification 4 5 1 Device Nomenclature 4 5 2 Package Markings 4 5 3 Memory Mapped Hardware Revision TLV...

Page 2: ...11 PMM12 PMM14 PMM15 PMM18 PMM20 PMM26 PORT15 PORT19 PORT26 RTC8 SD3 SYS16 UCS11 USCI36 USCI37 USCI41 USCI42 USCI47 USCI50 2 Preprogrammed Software Advisories Advisories that affect factory programmed...

Page 3: ...on Errata Number Rev A CPU21 CPU22 CPU40 Refer to the following MSP430 compiler documentation for more details about the CPU bugs workarounds TI MSP430 Compiler Tools Code Composer Studio IDE MSP430 O...

Page 4: ...ully qualified development support product XMS devices and X development support tools are shipped against the following disclaimer Developmental product is intended for internal evaluation purposes M...

Page 5: ...n how to locate the TLV structure and read out the HW_ID can be found in the device User s Guide www ti com Nomenclature Package Symbolization and Revision Identification SLAZ507AC JANUARY 2013 REVISE...

Page 6: ...l repeat sequence of channels ADC12CTL1 ADC12CONSEQx In addition the timer overflow flag cannot be used to detect an overflow ADC12IFGR2 ADC12TOVIFG Workaround 1 For manual trigger mode ADC12CTL0 ADC1...

Page 7: ...ly could be switched back to DVCC again When the system is running with the AUXVCC2 supply use SVMH to monitor AUXVCC2 voltage When AUXVCC2 is lower than the SVMH setting the program drives the chip i...

Page 8: ...io 2 Limit the supply voltage ramp up time through a series resistor e g 10 Ohm in the critical supply path Side effects such as voltage dips due to high current consumption of the device need to be c...

Page 9: ...ay result in device hang up Description When an active interrupt service request is pending and the POPM instruction is used to set the Status Register SR and initiate entry into a low power mode the...

Page 10: ...ugh flash erase Description When single stepping over code that initiates an INFOD Flash memory erase the program counter is corrupted Workaround None NOTE This erratum applies to debug mode only CPU3...

Page 11: ...ranching to a wrong address location in code and leading to wrong program execution For example a conditional jump instruction followed by data section 0140h 0x8012 Loop DEC W R6 0x8014 DEC W R7 0x801...

Page 12: ...if POPM W is used OR 2 Use the POPM instruction for all but the last restore operation For the the last restore operation use the POP assembly instruction instead For instance instead of using POPM W...

Page 13: ...cess interrupts 20 bit wide accesses to the DMA address registers OR 2 When accessing the DMA address registers enable the Read Modify Write disable bit DMARMWDIS 1 or temporarily disable all active D...

Page 14: ...ion If a DMA access to the module occurs while that module is issuing a wait state the module may exhibit undefined behavior Workaround Ensure that DMA accesses to the affected modules occur only when...

Page 15: ...e dependent low or high supply voltage levels if the LPMx 5 debug support feature is enabled To avoid a potentially unreliable debug session or general issues with JTAG device connectivity and the res...

Page 16: ...amming tools purchased from TI MSP FET LaunchPad update to CCS version 6 1 3 later or IAR version 6 30 or later to resolve the issue 2 If using the MSP GANG Production Programmer use v1 2 3 0 or later...

Page 17: ...ed frequency of operation on exit from LPM3 and LPM4 for up to 6 us The increased frequency has the potential to change the expected timing behavior of peripherals that select SMCLK as the clock sourc...

Page 18: ...e SVSMHCTL and SVSMLCTL registers is immediately followed by an LPM2 LPM3 LPM4 entry without waiting the requisite settling time PMMIFG SVSMLDLYIFG 0 and PMMIFG SVSMHDLYIFG 0 or The following two cond...

Page 19: ...r PMM configuration functions Use the following function PMM15Check void to determine whether or not the existing PMM configuration is affected by the erratum The return value of the function is 1 if...

Page 20: ...p from LPM2 3 4 the internal VCORE voltage can experience voltage drop below the corresponding SVSL and SVML threshold recommendation according to User s Guide leading to an unexpected SVSL SVML event...

Page 21: ...al Function In system debugging causes the PMALOCKED bit to be always set Description The port mapping controller registers cannot be modified when single stepping or halting at break points between a...

Page 22: ...nal Function Incorrect conversion result in twos complement mode when VFS is applied Description When the SD converter is configured in twos complement mode with left or right alignment and any OSR se...

Page 23: ...rce I2C clock Workaround Use LFXTCLK via ACLK or HFXTCLK via SMCLK as clock source BRCLK for I2C in master mode with external clock source USCI37 USCI Module Category Functional Function Reading RXBUF...

Page 24: ...Workaround None USCI47 USCI Module Category Functional Function eUSCI SPI slave with clock phase UCCKPH 1 Description The eUSCI SPI operates incorrectly under the following conditions 1 The eUSCI_A or...

Page 25: ...UCxTXBUF while the UCxSTE input is in the inactive state may not be transmitted correctly If the eUSCI is used with UCSTEM 1 STE pin used to output an enable signal data is transmitted correctly Work...

Page 26: ...2019 to May 19 2021 Page Changed the document format and structure updated the numbering format for tables figures and cross references throughout the document 6 Revision History www ti com 26 MSP430...

Page 27: ...are subject to change without notice TI grants you permission to use these resources only for development of an application that uses the TI products described in the resource Other reproduction and...

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