Texas Instruments MSP430F67471, Manual

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DMA9
DMA Module
Category
Functional
Function DMA stops transferring bytes unexpectedly
Description When the DMA is configured to transfer bytes from the eUSCI_A or eUSCI_B transmit
or receive buffers, the transmit or receive triggers (TXIFG and RXIFG) may not be seen
by the DMA module and the transfer of the bytes is missed. Once the first byte in a
transfer sequence is missed, all the following bytes are missed as well. All eUSCI_A
modes (UART, SPI, and IrDA) and all eUSCI_B modes (SPI and I2C) are affected.
Workaround 1) Use Interrupt Service Routines to transfer data to and from the eUSCI_A or eUSCI_B.
OR
2) When using DMA channel 0 for transferring data to and from the eUSCI_A or
eUSCI_B, use DMA channel 2 (lower priority than DMA channel 0) to read the same
register of the eUSCI_A or eUSCI_B that DMA channel 0 is working with. Use the same
USCI IFG (e.g. UCA0RXIFG) as trigger source for these both DMA channels.
DMA10
DMA Module
Category
Functional
Function DMA access may cause invalid module operation
Description The peripheral modules MPY, CRC, USB, RF1A and FRAM controller in manual mode
can stall the CPU by issuing wait states while in operation. If a DMA access to the
module occurs while that module is issuing a wait state, the module may exhibit undefined
behavior.
Workaround Ensure that DMA accesses to the affected modules occur only when the modules are
not in operation. For example with the MPY module, ensure that the MPY operation is
completed before triggering a DMA access to the MPY module.
EEM17
EEM Module
Category
Debug
Function Wrong Breakpoint halt after executing Flash Erase/Write instructions
Description Hardware breakpoints or Conditional Address triggered breakpoints on instructions that
follow Flash Erase/Write instructions, stops the debugger at the actual Flash Erase/Write
instruction even though the flash erase/write operation has already been executed. The
hardware/conditional address triggered breakpoints that are placed on either the next two
single opcode instructions OR the next double opcode instruction that follows the Flash
Erase/Write instruction are affected by this erratum.
Workaround None. Use other conditional/advanced triggered breakpoints to halt the debugger right
after Flash erase/write instructions.
Note
This erratum affects debug mode only.
EEM19
EEM Module
Advisory Descriptions www.ti.com
14 MSP430F67471 Microcontroller SLAZ502AC – JANUARY 2013 – REVISED MAY 2021
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