MSP430x31x
MIXED SIGNAL MICROCONTROLLERS
SLAS165D − FEBRUARY 1998 − REVISED APRIL 2000
1
POST OFFICE BOX 655303
•
DALLAS, TEXAS 75265
POST OFFICE BOX 1443
•
HOUSTON, TEXAS 77251−1443
D
Low Supply Voltage Range 2.5 V − 5.5 V
D
Ultra Low-Power Consumption
D
Low Operation Current, 400
μ
A at 1 MHz,
3 V
D
Five Power Saving Modes: (Standby Mode:
1.3
μ
A, RAM Retention/Off Mode: 0.1
μ
A)
D
Wakeup From Standby Mode in 6
μ
s
Maximum
D
16-Bit RISC Architecture, 300 ns Instruction
Cycle Time
D
Single Common 32 kHz Crystal, Internal
System Clock up to 3.3 MHz
D
Integrated LCD Driver for up to 64 or 92
Segments
D
Slope A/D Converter With External
Components
D
Serial Onboard Programming
D
Program Code Protection by Security Fuse
D
Family Members Include:
MSP430C311S: 2k Byte ROM, 128 Byte RAM
MSP430C312: 4k Byte ROM, 256 Byte RAM
MSP430C313: 8k Byte ROM, 256 Byte RAM
MSP430C314: 12k Byte ROM, 512 Byte RAM
MSP430C315: 16k Byte ROM, 512 Byte RAM
MSP430P313: 8k Byte OTP, 256 Byte RAM
†
MSP430P315: 16k Byte OTP, 512 Byte RAM
MSP430P315S: 16k Byte OTP, 512 Byte RAM
D
EPROM Version Available for Prototyping
:
PMS430E313FZ
†
, PMS430E315FZ
D
Available in:
56-Pin Plastic Small-Outline Package
(SSOP),
48-Pin SSOP (MSP430C311S,
MSP430P315S),
68-Pin J-Leaded Ceramic Chip Carrier
(JLCC) Package (EPROM Only)
description
The MSP430 is an ultralow-power mixed signal microcontroller family consisting of several devices that feature
different sets of modules targeted to various applications. The microcontroller is designed to be battery operated
for an extended application lifetime. With 16-bit RISC architecture, 16-bit integrated registers on the CPU, and
a constant generator, the MSP430 achieves maximum code efficiency. The digitally-controlled oscillator,
together with the frequency-locked-loop (FLL), provides a wakeup from a low-power mode to active mode in
less than 6
m
s.
†
MSP430P313/E313 not recommended for new designs − replaced by MSP430P315/E315.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright
©
2000, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
NC − No internal connection
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26
27
28
56
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48
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32
31
30
29
TDO/TDI
TDI/VPP
TMS
TCK
RST/NMI
XBUF
V
SS
V
CC
R23
R13
Xin
Xout/TCLK
P0.0
P0.1/RXD
P0.2/TXD
P0.3
P0.4
P0.5
P0.6
P0.7
TP0.0
TP0.1
TP0.2
TP0.3
TP0.4
TP0.5
CIN
NC
NC
COM3
COM2
COM1
COM0
S27/O27/CMPI
S26/O26
S23/O23
S22/O22
S18/O18
S17/O17
S16/O16
S15/O15
S14/O14
S13/O13
S12/O12
S11/O11
S10/O10
S9/O9
S8/O8
S7/O7
S6/O6
S5/O5
S4/O4
S3/O3
S2/O2
S1
S0
DL PACKAGE
(56-PIN TOP VIEW)
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2
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4
5
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8
9
10
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13
14
15
16
17
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20
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48
47
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40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
TDI/VPP
TMS
TCK
RST/NMI
XBUF
V
SS
V
CC
R23
R13
Xin
Xout/TCLK
P0.1/RXD
P0.2/TXD
P0.3
P0.4
P0.5
P0.6
NC
TP0.0
TP0.1
TP0.2
TP0.3
TP0.5
CIN
TDO/TDI
COM3
COM2
COM1
COM0
S27/O27/CMPI
NC
V
SS
NC
S16/O16
S15/O15
S14/O14
S13/O13
S12/O12
S11/O11
S10/O10
S9/O9
S8/O8
S7/O7
S6/O6
S5/O5
S4/O4
S3/O3
S2/O2
DL PACKAGE
(48-PIN TOP VIEW)
