Texas Instruments LP87745-Q1, User Manual

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3 Jumpers and connectors
LP877451Q1EVM has many terminal blocks, jumpers and test points to offer certain flexibility to help users to
verify the EVM according to their application conditions. However, the EVM is pre-configured with default jumper
settings and users can power up the regulators without the need of jumper modifications. Setting these jumpers
correctly for the correct function of the EVM is important.
Table 3-1 lists all the terminal blocks on the EVM and
Table 3-2 lists the jumpers and their functionality. All the terminal blocks are marked with polarity and Pin 1 of
test points / jumpers are marked with white dot for identification purpose. To understand more about the jumper
functionality, see the schematic diagrams in
Section 6.1 .
Table 3-1. Terminal Blocks
Terminal Block Number Terminal Block Name Description
J1 VIN 3.3V 3.3 V External Input Voltage
J17 VIO_LDO Terminal block for VIO_LDO
Output
J18 BOOST Terminal block for BOOST Output
J24 BUCK1 Terminal block for BUCK1 Output
J25 BUCK3 Terminal block for BUCK3 Output
J26 BUCK2 Terminal block for BUCK2 Output
J30 J30 USB Connector
J33 VBAT 5 V - 20 V Input
Table 3-2. Configuration Jumpers
Jumper/Connector Number Jumper/Connector Name Configuration Description
J2 WD_DIS
Closed (Default)
Pull down resistor in CS_SPI pin
enabled which will disable Q&A
watchdog during the PMIC power
up. For this to be effective, USB
cable should not be connected
to the EVM when the PMIC
is powered up. If USB cable
is connected before PMIC is
powered up, USB MCU will
drive this pin high (through
CS_SPI_WD at J15) during the
startup
Open
Q&A watchdog not disabled
during the PMIC power up
J3 EN_PVIN_3V3
Closed (Default)
Connects PMIC ENABLE pin
to PVIN_Bx pins (PVIN_3V3)
through a pull up resistor and
device gets enabled as soon as
3.3 V is generated/applied
Open
If PMIC needs to be enabled
through USB/GUI or through pre-
regulator PGOOD signal, then
this jumper must be kept open
J4 PVIN_3V3
Option 1: Pins 1/3 and 2/4
3V3_PREREG (Default)
PVIN_3V3 connected to
preregulator output.
J4-Option-2 must be open and J5
must be open.
Option 2: Pins 5/7 and 6/8 3V3_PS
PVIN_3V3 connected to external
3.3V supply (J1).
J4-Option-1 must be open and J5
must be open.
Jumpers and connectors www.ti.com
4 LP877451Q1EVM Evaluation Module SNVU769A – SEPTEMBER 2021 – REVISED OCTOBER 2022
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