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Texas Instruments LMH1982, User Manual, Page: 9 / 15

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Texas Instruments LMH1982 User Manual Download Page 9

U7

8

A2

5

1

1

8

8

2

2

7

7

3

3

6

6

4

4

5

5

HREF A

VREF B

J8

OE1

VCC

1

R18

33k

VCC

A1

2

HSYNC

Y2

3

GND

4

VCC

R30

NP (10k)

VREF A

VCC

R29

NP (10k)

HREF A

VSYNC

NC7WZ125K8X

R20

NP (0)

R21

NP (0)

Y1

6

OE2

7

C19

100 nF

C38

10 

P

F

VCC

HREF B

VREF A

2

1

6

SW2

SWITCH

4X2

www.ti.com

Evaluation Board Schematic

Figure 5. Schematic (3 of 4)

Input Header and Switch-Controlled Logic Buffer

9

SNOA527A – May 2008 – Revised April 2013

AN-1841 LMH1982 Evaluation Board

Submit Documentation Feedback

Copyright © 2008–2013, Texas Instruments Incorporated

Summary of Contents for LMH1982

Page 1: ...ted in the References section 1 1 USB Interface Board Headers X2 and X4 of the USB interface board should be plugged into headers J7 and J11 of the evaluation board The USB board s firmware supports the I2 C interface which enables the user to program the LMH1982 from a PC running the evaluation software The USB board can also provide 5V from the PC s USB port to power the LDO regulators on the ev...

Page 2: ...sistors from R22 and R3 and then using a current meter in series 1 3 Reference Ports The LMH1982 has two reference ports REF_A and REF_B with H sync and V sync inputs which are used for phase locking the outputs in Genlock mode The input signals can be measured at test points TP27 TP28 TP30 and TP31 1 3 1 Analog Reference Input An SD or HD analog video signal can be applied to the BNC connector J2...

Page 3: ...in Name Pin Pin Name 1 GND 8 HIN_A 2 GND 7 VIN_A 3 GND 6 HIN_B 4 GND 5 VIN_B 1 4 Output Clock The LVDS output SD and HD clocks from the LMH1982 are routed via controlled 100Ω differential impedance lines to edge mount SMA connectors as indicated in Table 5 If a differential probe will be used to measure the clocks directly on the board then the differential lines should be terminated by populating...

Page 4: ...rent loop filter component values or topologies to meet output clock jitter and lock time requirements for other input reference signals and applications For example to generate low jitter output clock from a high jitter input reference e g recovered H signal from an FPGA SDI receiver a narrowband loop filter e g BW 1 Hz is recommended for maximum jitter attenuation In addition to changing the loo...

Page 5: ...e functional after they have been enabled by programming the control registers During normal operation the RESET input must be set high otherwise the device will not function properly To reset the control registers of the LMH1982 toggle RESET low for at least 10 µs for proper reset and then set high To enable programming via the I2 C interface the I2C_ENABLE input must be set low If I2C_ENABLE is ...

Page 6: ...e Windows operating system OS will interpret the USB board as a Human Interface Device HID and use Microsoft s standard HID driver included in the OS The LMH1982 evaluation software application can access the USB board through dynamic link libraries which are used by the PC application to control the LMH1982 using the I2 C interface For more information consult the USB board reference manual and L...

Page 7: ...P38693MP 3 3 Vin 2 SD 1 Vout 3 ADJ 4 GND C2 10 PF 5 R2 0 C3 47 PF C11 100 nF VCC3V3 EXT3V3 JP1 C42 10 PF C41 47 PF C5 100 nF C13 100 nF VDD TP3 VDD C9 100 nF R3 0 VCC3V3 www ti com Evaluation Board Schematic 2 Evaluation Board Schematic Figure 3 Schematic 1 of 4 LP38693 LDO Regulators with External Power Input Header 7 SNOA527A May 2008 Revised April 2013 AN 1841 LMH1982 Evaluation Board Submit Do...

Page 8: ...50 VSOUT VSYNC VSOUT R1 10 0k 1 1 REXT C32 10 nF Vcc3 10 CSOUT 12 BPOUT 13 OEOUT 14 C36 10 PF C4 100 nF VCC TP2 VCC VCC3V3 R26 50 OEOUT TP7 OEOUT VIN C39 560 pF C30 OPEN R24 100 R23 75 J2 ANALOG REF 1 Evaluation Board Schematic www ti com Figure 4 Schematic 2 of 4 LMH1981 and LMH1980 Sync Separators 8 AN 1841 LMH1982 Evaluation Board SNOA527A May 2008 Revised April 2013 Submit Documentation Feedba...

Page 9: ...125K8X R20 NP 0 R21 NP 0 Y1 6 OE2 7 C19 100 nF C38 10 PF VCC HREF B VREF A 2 1 6 SW2 SWITCH 4X2 www ti com Evaluation Board Schematic Figure 5 Schematic 3 of 4 Input Header and Switch Controlled Logic Buffer 9 SNOA527A May 2008 Revised April 2013 AN 1841 LMH1982 Evaluation Board Submit Documentation Feedback Copyright 2008 2013 Texas Instruments Incorporated ...

Page 10: ... C50 100 nF C51 100 nF 0 R22 TP1 VDD 8 VREF_B 7 HREF_B 6 REF_SEL 5 VREF_A 4 HREF_A 3 2 GND 1 VC_FREERUN 50 R41 REF_SEL 50 R6 HREF_B 50 R7 VREF_B TP30 HREF_B TP31 VREF_B 50 R25 VREF_A TP28 VREF_A 50 R14 HREF_A TP27 HREF_A C24 100 nF R13 NP 0 R12 50 R9 50 R10 TP23 TOF_OUT TOF_OUT 100 nF C23 C22 100 nF U5 U8 LMP7701 C22 100 nF 3 4 1 2 5 C29 100 nF P1 50k NP R27 JP5 U6 LMP7701 C12 100 nF 3 4 1 2 5 50 ...

Page 11: ... Layout Figure 7 PCB Layout 1 of 2 Top Routing Layer 1 dark gray and Ground Plane Layer 2 light gray 11 SNOA527A May 2008 Revised April 2013 AN 1841 LMH1982 Evaluation Board Submit Documentation Feedback Copyright 2008 2013 Texas Instruments Incorporated ...

Page 12: ... C29 20 C33 C44 C50 100 nF X7R 0603 1 C51 100 nF X7R 0805 1 C6 100 nF X7R 1206 1 C13 100 µF X7R 0603 2 C17 C28 1 µF X7R 0805 8 C2 C7 C38 C42 C43 C53 C55 10 µF X5R 0805 2 C3 C8 47 µF 3528 TANT B 3 C10 C27 C41 22 µF X5R 1206 2 C26 C32 10 nF X7R 0603 1 C39 560 pF NPO 0603 2 D3 D4 GREEN SMT LED 0805 1 J1 6 PIN HEADER 6X1 1 J2 EDGE MOUNT BNC SMA 12 AN 1841 LMH1982 Evaluation Board SNOA527A May 2008 Rev...

Page 13: ...INT 1 U1 LP38693 SOT223 5 1 U2 LP38693 SOT223 5 1 U3 LMH1980 NP 1 VSSOP10 1 U4 LMH1981 TSSOP14 1 U5 LMH1982 WQFN 32 2 U6 U8 LMP7701 SOT23 5 1 U7 NC7WZ125K8X US 8 1 X1 CTS 357LB3I27M0000 27 MHz VCXO VCXO 7 8 4 40 THREADED NYLON 4 STANDOFF 4 3 8 4 40 SCREW C15 C30 C40 R13 R20 R21 R27 NP 1 1 NP Not Populated 5 References LMH1982 Multi rate Video Clock Generator with Genlock Data Sheet SNLS289 LMH1981...

Page 14: ...esponsible for compliance with all legal regulatory and safety related requirements concerning its products and any use of TI components in its applications notwithstanding any applications related information or support that may be provided by TI Buyer represents and agrees that it has all the necessary expertise to create and implement safeguards which anticipate dangerous consequences of failur...

Page 15: ...Mouser Electronics Authorized Distributor Click to View Pricing Inventory Delivery Lifecycle Information Texas Instruments LMH1982SQEEVAL LMH1982SQEEVAL NOPB ...

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