background image

4 Mother Board Schematic

AGND

AGND

AGND

AGND

Vin

HS_FET_PWM

LS_FET_PWM

PGND

VAUX 12V

AGND

PGND

PGND

PGND

PGND

AGND

12V

AGND

VIN

1

EN

3

SS

5

GND

4

FB

6

RON

2

VOUT

7

EP

8

LMZ12001EXTTZ/NOPB

U4

AGND

AGND

AGND

AGND

630V

0.1uF

CIN3

630V

0.1uF

CIN4

1

2

3

4

5

J3

112404

1

2

3

4

5

J8

112404

D1

BAT54WS-7-F

7

1

S

N

7

4

LV

C

3

G

1

4D

C

U

TG

4

U3A

5

3

S

N

7

4

LV

C

3

G

1

4D

C

U

TG

4

U3B

2

6

S

N

7

4

LV

C

3

G

1

4D

C

U

TG

4

U3C

GND

4

VCC

8

SN74LVC3G14DCUTG4

U3D

D3

BAT54WS-7-F

5

3

S

N

7

4

LV

C

3

G

1

4D

C

U

TG

4

U5B

2

6

S

N

7

4

LV

C

3

G

1

4D

C

U

TG

4

U5C

7

1

S

N

7

4

LV

C

3

G

1

4D

C

U

TG

4

U5A

AGND

GND

4

VCC

8

SN74LVC3G14DCUTG4

U5D

7

1

2

U1A

3

5

6

U1B

VCC

8

GND

4

U1C

AGND

1

3

5

7

9

11

J5A

HLE-106-02-G-DV-BE-A

2

4

6

8

10

12

J5B

HLE-106-02-G-DV-BE-A

1

2

J6

282834-2

630V

0.1uF

COUT3

630V

0.1uF

COUT4

0

R9

1

2

3

J7

TSW-103-07-G-S

SH-J1

SNT-100-BK-G

1.6k

R31

Green

1

2

5V_EN

LG L29K-G2J1-24-Z

1

2

3

4

47uH

47uH

L3

HS_FET_PWM

HS_FET_OCZ

HS_FET_TEMP

HS_FET_FAULTZ

AGND

LS_FET_PWM

LS_FET_OCZ

LS_FET_TEMP

LS_FET_FAULTZ

1.18k

R26

AGND

PGND

30k

R16

30k

R17

30k

R11

30k

R12

30k

R18

30k

R13

30k

R19

30k

R14

30k

R20

30k

R10

H

V

B

U

S

Red

1

2

HS_FLT

LS L29K-G1J2-1-Z

5
4

1

2

3

6

J2

TSW-106-07-G-S

5
4

1

2

3

6

J4

TSW-106-07-G-S

12V

VAUX

ACMGND

AGND2

AGND1

HVIN

HVOUT

PGND4

SW

PGND5

PWM_HS

PWM_LS

HS_FET_PWM

LS_FET_PWM

5

V

5V

5V

5V

5V

LS_FET_FAULTZ

SH-J2

SNT-100-BK-G

SH-J3

SNT-100-BK-G

LS_FET_TEMP_FILT

HS_FET_TEMP_FILT

3

5

6

U2B

VCC

8

GND

4

U2C

AGND

AGND

5V

AGND

AGND

Red

1

2

LS_FLT

LS L29K-G1J2-1-Z

5

V

AGND

AGND

5K

R3

3224X-1-502E

5K

R15

3224X-1-502E

5V

1

2

J12

282834-2

AGND

5V

AGND

25V

10uF

C15

6.3V

100uF

C17

22nF

50V

C16

33.2k

R28

22nF

50V

C20

AGND

600V

150uF

C25

3.3k

R1

3.3k

R5

LS_FET_OCZ

HS_FET_OCZ

7

1

2

U2A

HS_FET_FAULTZ

1

2

3

J14

TSW-103-07-G-S

SH-J5

SNT-100-BK-G

J17

3267

J16

3267

J18

3267

1

2

J10

TSW-102-07-G-S

1

2

J11

TSW-102-07-G-S

5

V

100k

R6

100k

R22

3

1

2

4

900V

20µF

C22

Yellow

1

2

HS_OC

SML-E12Y8WT86

5

V

AGND

AGND

3.3k

R29

HS_FET_OCZ

Yellow

1

2

LS_OC

SML-E12Y8WT86

5

V

AGND

AGND

3.3k

R30

LS_FET_OCZ

0

R2

0

R4

Green

1

2

HVIN_EN

LG L29K-G2J1-24-Z

VAUX

HVBUS

HVOUT

PWM_HS

PWM_LS

PGND

S

W

L2

12

V

au

x

1µF

25V

C1

1µF

25V

C9

1µF

25V

C18

50V

39pF

C10

50V

39pF

C23

50V

39pF

C12

50V

39pF

C5

50V

39pF

C14

50V

39pF

C21

25V

10uF

C19

1

2

J1

0395443002

1

2

J9

0395443002

1

HVBUS1

1

SW1

1

PGND1

1

HVBUS2

1

SW2

1

PGND2

SH-J4

SNT-100-BK-G

1

2

J13

TSW-102-07-G-S

6.20k

R25

HS_FET_TEMP

AGND

HS_FET_TEMP_FILT

105k

R8

50V

1600pF

C2

HS_FET_OCZ

100

R7

HS_FET_FAULTZ

HS_FET_PWM

5V

AGND

1µF

25V

C8

12V

AGND

1µF

25V

C6

LS_FET_TEMP

AGND

LS_FET_TEMP_FILT

105k

R27

50V

1600pF

C3

LS_FET_OCZ

100

R21

LS_FET_FAULTZ

LS_FET_PWM

1
2
3

J15

TSW-103-07-G-S

AGND

12V

TACH

TACH

Figure 4-1. LMG342X-BB-EVM Schematic

www.ti.com

LMG352XEVM-04X Schematic

SNOU178A – OCTOBER 2020 – REVISED FEBRUARY 2021

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LMG352XEVM-04X User Guide

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Copyright © 2021 Texas Instruments Incorporated

Summary of Contents for LMG352 EVM-04 Series

Page 1: ... 15 7 1 Setup 15 7 2 Start Up and Operating Procedure 16 7 3 Test Results 17 7 4 Shutdown Procedure 18 7 5 Additional Operating Notes 18 8 Test Procedure When Paired With LMG34XX BB EVM 19 8 1 Setup 19 8 2 Start Up and Operating Procedure 21 8 3 Shutdown Procedure 22 8 4 Additional Operation Notes 22 9 Bill of Materials 23 10 Revision History 26 List of Figures Figure 2 1 LMG352XEVM 04X Block Diag...

Page 2: ... Point Functional Description 21 Table 8 2 List of Terminals 21 Table 9 1 Bill of Materials for LMG352XEVM 04X 23 Table 9 2 Bill of Materials for LMG342X BB EVM 24 Trademarks All trademarks are the property of their respective owners Trademarks www ti com 2 LMG352XEVM 04X User Guide SNOU178A OCTOBER 2020 REVISED FEBRUARY 2021 Submit Document Feedback Copyright 2021 Texas Instruments Incorporated ...

Page 3: ...ecting inadvertent access All interface circuits power supplies evaluation modules instruments meters scopes and other related apparatus used in a development environment exceeding 50 VRMS 75 VDC must be electrically located within a protected Emergency Power Off EPO power strip Use a stable and non conductive work surface Use adequately insulated clamps and wires to attach measurement probes and ...

Page 4: ...EVM CAUTION Do not leave the EVM powered when unattended WARNING Hot surface Contact may cause burns Do not touch WARNING High Voltage Electric shock is possible when connecting board to live wire Board must be handled with care by a professional For safety use of isolated test equipment with overvoltage and overcurrent protection is highly recommended General TI High Voltage Evaluation User Safet...

Page 5: ... PIN PIN DESIGNATION DESCRIPTION LS PWM 1 Logic gate signal input for low side LMG352XR0X0 Compatible with both 3 3 V and 5 V logic Referenced to AGND HS TEMP 2 PWM TEMP output for high side LMG352XR0X0 Referenced to AGND LS Fault 3 FAULT output signal for low side LMG352XR0X0 Referenced to AGND HS OC 4 OC output signal for high side LMG352XR0X0 Referenced to AGND LS OC 5 OC output signal for low ...

Page 6: ... overtemperature event occurs or when an overcurrent short circuit event occurs on the LMG352XR0X0 The signals are level shifted to AGND Refer to the LMG352XR0X0 data sheet for operation details CAUTION Do NOT ignore a FAULT signal when using the LMG352XEVM 04X Turn off both top and bottom devices if any device generates a FAULT signal The device under a fault condition may operate in the undesire...

Page 7: ... Place a 2 Ω resistor on R2 3 Place a 650 V SMB diode on D1 such as GB01SLT06 214 4 Adjust Rdrv resistor for the low side to be above 400 kΩ which corresponds to a slew rate below 30 V ns for the low side 2 1 4 Heat Sink The heat sink is installed to help with heat dissipation of the LMG352XR0X0 Exposed top side thermal pads on device package are attached to heat sink with thermal interface materi...

Page 8: ...formance can be greatly improved For more information of the EVM thermal design and test results please refer to SNOAA70 application notes on thermal design The coldplate used in LMG352XEVM 04X EVM card is custom designed and please contact TI for more information Figure 2 4 EVM on Coldplate Introduction www ti com 8 LMG352XEVM 04X User Guide SNOU178A OCTOBER 2020 REVISED FEBRUARY 2021 Submit Docu...

Page 9: ...latching so PWM immediately resumes when the fault clears If the FAULT Protect mode is not desired that mode can be disabled by placing the jumper in the DIS position The FAULT LED will still illuminate when either LMG352XR0X0 has an active fault regardless of the position of FAULT Protect jumper 2 3 Typical Applications The LMG352XEVM 04X is designed for use in AC DC DC DC and DC AC applications ...

Page 10: ...13 DRAIN 14 DRAIN 15 DRAIN 16 SOURCE 17 SOURCE 18 SOURCE 19 SOURCE 20 SOURCE 21 SOURCE 22 SOURCE 23 SOURCE 24 SOURCE 25 SOURCE 26 SOURCE 27 SOURCE 28 SOURCE 29 SOURCE 30 SOURCE 31 SOURCE 32 SOURCE 33 SOURCE 34 SOURCE 35 SOURCE 36 SOURCE 37 SOURCE 38 SOURCE 39 LMG3525R030Q U2B 5V_L RDRV_L RDRV_H SW VNEG_H 5V_H ISO_RET_H_B VCC 2 CLK 6 D1 1 D2 3 EN 5 GND 4 SN6505BQDBVTQ1 U5 VCC 2 CLK 6 D1 1 D2 3 EN 5...

Page 11: ...FET_TEMP_FILT HS_FET_TEMP_FILT 3 5 6 U2B VCC 8 GND 4 U2C AGND AGND 5V AGND AGND Red 1 2 LS_FLT LS L29K G1J2 1 Z 5V AGND AGND 5K R3 3224X 1 502E 5K R15 3224X 1 502E 5V 1 2 J12 282834 2 AGND 5V AGND 25V 10uF C15 6 3V 100uF C17 22nF 50V C16 33 2k R28 22nF 50V C20 AGND 600V 150uF C25 3 3k R1 3 3k R5 LS_FET_OCZ HS_FET_OCZ 7 1 2 U2A HS_FET_FAULTZ 1 2 3 J14 TSW 103 07 G S SH J5 SNT 100 BK G J17 3267 J16 ...

Page 12: ... 630V C16 1µF C18 AGND 1µF C20 LOW_2 HIGH_2 HIGH_2 LOW_2 5 4 1 2 3 6 J4 TSW 106 07 G S 1µF C8 VAUX ACMGND 1 2 3 4 5 6 J2 0448120024 AGND1 AGND4 5V AGND 3 4 5 2 U1B SN74LVC2G14DCKR AGND3 0 R23 0 R21 IN 1 OUT 3 GND 2 TAB 4 U4 LM2940IMP 5 0 NOPB 33µF C19 10µF C21 12V 12V 12V Green 1 2 D4 Red 1 2 D3 1 6k R6 1 6k R8 30k R10 30k R16 30k R11 30k R17 30k R18 30k R12 30k R13 30k R19 30k R20 30k R14 1 2 3 J...

Page 13: ...ootprint to interface with the LMG352XEVM 04X daughter card is shown below Figure 5 1 Recommended Footprint for LMG352XEVM 04X www ti com Recommended Footprint SNOU178A OCTOBER 2020 REVISED FEBRUARY 2021 Submit Document Feedback LMG352XEVM 04X User Guide 13 Copyright 2021 Texas Instruments Incorporated ...

Page 14: ...r board is not needed with LMG342x BB EVM Oscilloscope Capable of at least 200 MHz operation A 1 GHz or greater oscilloscope and probes with short ground springs are required for accurate measurements DC Multimeter s Capable of 650 V measurement suitable for determining operation and efficiency if desired DC Load Capable of 650 V operation at up to 20 A in current mode operation Fan For the heatsi...

Page 15: ...onnect Pin 1 to Pin2 for header J7 and J14 Pin1 of J7 and J14 are indicated in Figure 7 2 This allows the two PWM signals to directly control the high side and low side devices 7 If fault interlock feature is desired please connect jumper J10 and J11 Otherwise disconnect them and the PWM signals can always pass through to the devices 8 Set the signal generator to a desired frequency and duty cycle...

Page 16: ...e the fast switching transient in the switch node it is recommended to use the high bandwidth high voltage passive probes with minimized ground loop connections 6 It is recommended to add common mode chokes to the measurement signals and to the power input output connections 7 Enable the high voltage power supply and make sure to ramp the voltage up gradually from 0V to the desired bus voltage up ...

Page 17: ...n in Figure 7 5 a turn on voltage slew rate of 148 V ns is observed at 400V 20A switching conditions Low Side PWM 5V div Switch node Voltage 100V div Load Current 10A div Figure 7 4 Continuous Buck Operation at 4 kW Low Side PWM 5V div Switch node Voltage 100V div Load Current 10A div Slew Rate 148V ns Figure 7 5 Fast Slew Rate at 400V 20A Switching Conditions The turn on slew rate of the device c...

Page 18: ... Switch node Voltage 100V div Load Current 5A div Slew Rate 33V ns Low Side Fault 5V div Figure 7 9 33V ns at 400V 10A 7 4 Shutdown Procedure 1 Turn off the high voltage power supply then PWM Wait until red HV Enable LED turns off 2 Disable the 12 V bias supply 7 5 Additional Operating Notes Fault protection on the LMG342X BB EVM is not latching therefore PWM will resume if a fault clears and the ...

Page 19: ...ows the LMG352XEVM 04X connected to the LMG34XX BB EVM Note TI provides a custom interposer board that must be used when the LMG352XEVM 04X is paired with the LMG34XX BB EVM The interposer board is not needed with LMG342x BB EVM Figure 8 1 LMG352XEVM 04X Connected to the LMG34XX BB EVM www ti com Test Procedure When Paired With LMG34XX BB EVM SNOU178A OCTOBER 2020 REVISED FEBRUARY 2021 Submit Docu...

Page 20: ...B EVM 1 Connect the oscilloscope or multimeter probes to the desired test points in A or G 2 Connect the 12 V bias supply connect load to output and connect the input supply to input 3 Connect the function generator to either the BNC connector PWM input at C or 100 mil header connector input at pin 6 PWM and pin 5 GND at B 4 Connect 12 V bias supply to the fan attached on the EVM or enable an exte...

Page 21: ...r this EVM version not all the test points are available on the motherboard due to the size of the daughter card To probe the switching node TI recommends using a pigtail on the daughter card on PGND pin A probe could use the PGND pigtail and SW test point on the daughter card to complete the measurement 8 1 2 List of Terminals Table 8 2 List of Terminals TERMINAL NAME DESCRIPTION J1 VIN Input DC ...

Page 22: ... the high voltage power supply then PWM Wait until the red HV Enable LED turns off 2 Disable the 12 V bias supply 8 4 Additional Operation Notes Fault protection on the LMG34XX BB EVM is not latching therefore PWM will resume if a fault clears and the LMG34XX BB EVM is still operational Test Procedure When Paired With LMG34XX BB EVM www ti com 22 LMG352XEVM 04X User Guide SNOU178A OCTOBER 2020 REV...

Page 23: ...0 V 5 C0G NP0 AEC Q200 Grade 1 0402 GCQ1555C1H430JB01D C42 C43 2 CAP CERM 100 pF 50 V 5 C0G NP0 AEC Q200 Grade 1 0402 CGA2B2C0G1H101J050BA D1 1 Diode Schottky 650 V 1 A SMB GB01SLT06 214 D2 D3 2 Bridge Rectifier Single Phase Schottky 40V Surface Mount MBS KMB24STR D5 D6 2 Diode Zener 16 V 500 mW AEC Q101 SOD 123 BZT52C16 7 F H1 1 Heat Sink Black Anodized 35 x 50 mm 20 mm high with Push Pin and Spr...

Page 24: ...1 24 Z ACMGND AGND1 AGND2 PGND4 PGND5 5 Test Point Compact Black TH 5006 C1 C6 C8 C9 C18 5 CAP CERM 1 µF 25 V 10 X7R AEC Q200 Grade 1 0603 CGA3E1X7R1E105K080AD C2 C3 2 CAP CERM 1600 pF 50 V 5 C0G NP0 0603 GRM1885C1H162JA01D C5 C10 C12 C14 C21 C23 6 CAP CERM 39 pF 50 V 5 C0G NP0 0603 GRM1885C1H390JA01D C15 1 CAP CERM 10 uF 25 V 20 X5R 0603 GRT188R61E106ME13D C16 C20 2 CAP CERM 0 022 uF 50 V 10 X7R ...

Page 25: ... CRCW06033K30JNEA R2 R4 R9 3 RES 0 5 0 1 W AEC Q200 Grade 0 0603 CRCW06030000Z0EA R3 R15 2 Trimmer 5 K 0 25 W SMD 3224X 1 502E R6 R22 2 RES 100 k 5 0 1 W 0603 CRCW0603100KJNEAC R7 R21 2 RES 100 5 0 1 W AEC Q200 Grade 0 0603 CRCW0603100RJNEA R8 R27 2 RES 105 k 1 0 1 W 0603 RC0603FR 07105KL R10 R11 R12 R13 R14 R16 R17 R18 R19 R20 10 RES 30 k 5 0 25 W AEC Q200 Grade 0 1206 CRCW120630K0JNEA R25 1 RES ...

Page 26: ...r from page numbers in the current version DATE REVISION NOTES February 2021 Initial Public Release Revision History www ti com 26 LMG352XEVM 04X User Guide SNOU178A OCTOBER 2020 REVISED FEBRUARY 2021 Submit Document Feedback Copyright 2021 Texas Instruments Incorporated ...

Page 27: ...other than TI b the nonconformity resulted from User s design specifications or instructions for such EVMs or improper system design or c User has not paid on time Testing and other quality control techniques are used to the extent TI deems necessary TI does not test all parameters of each EVM User s claims against TI under this Section 2 are void if User fails to notify TI of any apparent defects...

Page 28: ... These limits are designed to provide reasonable protection against harmful interference in a residential installation This equipment generates uses and can radiate radio frequency energy and if not installed and used in accordance with the instructions may cause harmful interference to radio communications However there is no guarantee that interference will not occur in a particular installation...

Page 29: ...y for convenience and should be verified by User 1 Use EVMs in a shielded room or any other test facility as defined in the notification 173 issued by Ministry of Internal Affairs and Communications on March 28 2006 based on Sub section 1 1 of Article 6 of the Ministry s Rule for Enforcement of Radio Law of Japan 2 Use EVMs only after User obtains the license of Test Radio Station as provided in R...

Page 30: ... any interfaces electronic and or mechanical between the EVM and any human body are designed with suitable isolation and means to safely limit accessible leakage currents to minimize the risk of electrical shock hazard User assumes all responsibility and liability for any improper or unsafe handling or use of the EVM by User or its employees affiliates contractors or designees 4 4 User assumes all...

Page 31: ...OR DAMAGES ARE CLAIMED THE EXISTENCE OF MORE THAN ONE CLAIM SHALL NOT ENLARGE OR EXTEND THIS LIMIT 9 Return Policy Except as otherwise provided TI does not offer any refunds returns or exchanges Furthermore no return of EVM s will be accepted if the package has been opened and no return of the EVM s will be accepted if they are damaged or otherwise not in a resalable condition If User feels it has...

Page 32: ...s are subject to change without notice TI grants you permission to use these resources only for development of an application that uses the TI products described in the resource Other reproduction and display of these resources is prohibited No license is granted to any other TI intellectual property right or to any third party intellectual property right TI disclaims responsibility for and you wi...

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