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The USB2PWI board is powered by the USB port. It generates a 3.6-V V

BAT

. V

BAT

 is used on the evaluation 

board to provide the on board 2.5 V, which can be used to power VPWI. V

BAT

 can also be connected to PVIN 

to power the LM10500 when no other power supply is available, but the loading capability is limited on V

BAT

. If 

available, PVIN should be powered by a bench supply with sufficient voltage and current ranges.

8.3 PWI Communication Using 9-Pin Connector J1

The LM10500 evaluation board can also interface to an AVS-compatible primary controller using J1. All signals 
related to the PWI signaling environment are available on this 1x9 header on the edge of the board. Although 
primarily intended for signal inspection, this header also allows external control of the PWI communication. 
This connector allows the LM10500 to be tested in a closed AVS loop with a primary controller, such as AVS 
compatible ASICs, SoCs, and processors.

The pin list of J1 is shown in the following table.

Pin

Label

Type

Description

1

GND

GND

Ground

2

VBAT

Power

VBAT or sense

3

PWROK

Output

PWROK

4

RESETN

Input

1: Active

0: Reset

5

ENABLE

Input

1: Enabled

0: Disabled

6

SPWI

Input/Output

PWI data

7

SCLK

Input

PWI clock

8

VPWI

Power

VPWI-EXT or sense

9

GND

GND

Ground

The pins are spaced at 100-mil intervals. They can also be used as a sensing pin to determine the drive level 
for the PWI interface pins: SCLK, SPWI, PWROK, ENABLE, and RESETN. VBAT and VPWI should be used as 
the control voltage input when the USB2PWI board is not connected. SPWI and SCLK are PWI communication 
data pin and clock pin, respectively. ENABLE is connected to the EN pin of the device. It is pulled up to AVIN 
through a 10-kΩ resistor on the board. This pin also can be used to enable/disable the device externally. If driven 
externally, a voltage typically greater than 1.2 V will enable the device. VPWI is for powering VPWI pin externally 
or monitoring the VPWI pin. VPWI range is from (1.8 V– 10%) to (3.3 V + 10%).

9 User’s GUI for LM10500 Evaluation Board

A user’s GUI is provided to control LM10500 evaluation boards through USB connection. The GUI for LM10500 
is shown in 

Figure 9-1

. It is compatible with both PWI1.0 and PWI2.0. The GUI supports PWI1.0 and PWI2.0 

address 0. The LM10500 device supports PWI1.0 and PWI2.0 address 0, 1, 2, and 3. The GUI can read and 
write LM10500 registers to control and monitor the output voltage and operation mode. The GUI can also 
enable, reset the LM10500, and control the operation states, such as sleep, wake up, shutdown and reset, by 
generating PWI commands. All AVS functions of the LM10500 can be tested easily through the GUI.

9.1 Quick Start Guide

1. Connect the LM10500 evaluation board to the USB2PWI interface board (as in 

Figure 8-1

) and plug the 

USB2PWI board to a PC using a USB cable. Apply PVIN and AVIN power to the LM10500 evaluation board. 
The part is enabled by default. Press the reset button on the SUB2PWI board. The reset button is the blue 
button located right next to the USB connector.

2. Run the GUI by double clicking ‘Evaluation.exe’, with ‘Evaluation.ini’ and ‘usblptio.dll’ in the same folder, 

from the PC. The default state of the GUI is shown in 

Figure 9-1

.

www.ti.com

Operation Guide

SNVA453B – AUGUST 2011 – REVISED JANUARY 2022

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LM10500 Step-Down Converter Evaluation Module User's Guide

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Copyright © 2022 Texas Instruments Incorporated

Summary of Contents for LM10500

Page 1: ...ling AVS scheme The LM10500 operates cooperatively with PowerWise AVS compatible ASICs SoCs and processors to optimize supply voltages adaptively over process and temperature variations The device is controlled through PWI 1 0 or PWI 2 0 high speed serial interface A typical power saving of 40 can be achieved when LM10500 is used with AVS compatible ASICs SoCs and processors 2 Adaptive Voltage Sca...

Page 2: ...re included in the evaluation kit to easily evaluate the LM10500 AVS functionality from a PC The evaluation kit is consist of LM10500 evaluation board as shown in Figure 5 1 USB2PWI interface board as shown in Figure 5 2 5 pin mini USB cable A CD including LM10500 evaluation GUI LM10500 data sheet LM10500 evaluation board user s guide this document There are two versions of LM10500 evaluation boar...

Page 3: ...ure 5 2 USB2PWI Interface Board www ti com Evaluation Kit Overview SNVA453B AUGUST 2011 REVISED JANUARY 2022 Submit Document Feedback LM10500 Step Down Converter Evaluation Module User s Guide 3 Copyright 2022 Texas Instruments Incorporated ...

Page 4: ...WI SCLK VDD2 AVIN AGND VDD1 CBOOT PVIN AVS PWROK I O Voltage PS EN CIN L 3 0 18 0V VOUT SYNC CF COUT CBOOT CVPWI CFRQ CVDD2 CVDD1 CC RF RADDR RC RFRQ RFB1 RFB2 AVS range 0 6 1 0V Figure 6 1 Typical Application Circuit Typical Application Circuit www ti com 4 LM10500 Step Down Converter Evaluation Module User s Guide SNVA453B AUGUST 2011 REVISED JANUARY 2022 Submit Document Feedback Copyright 2022 ...

Page 5: ...No of PCB Layers 4 Max Temperature 85 C 7 2 Terminal Descriptions Terminals Description PVIN Connect the power supply between this terminal and the GND terminal beside it The device is rated between 3 V to 18 V The absolute maximum voltage rating is 22 V GND The GND terminals are meant to provide close return paths to the power and signal terminals besides them They are all connected together on b...

Page 6: ... integration of the following High side and low side power MOSFETs Resistor programmable switching frequency Frequency synchronization Internal soft start Precision enable Power good PWROK indicator Input undervoltage lockout Overvoltage protection Overcurrent protection Thermal shutdown 8 2 PWI Communication Using USB2PWI Board The unique feature of the LM10500 is close loop adaptive voltage scal...

Page 7: ...espectively ENABLE is connected to the EN pin of the device It is pulled up to AVIN through a 10 kΩ resistor on the board This pin also can be used to enable disable the device externally If driven externally a voltage typically greater than 1 2 V will enable the device VPWI is for powering VPWI pin externally or monitoring the VPWI pin VPWI range is from 1 8 V 10 to 3 3 V 10 9 User s GUI for LM10...

Page 8: ...o unused bits are ignored The top four lines of the GUI are the PWI registers of the LM10500 R0 controls the core voltage ranging from 00h to 7Fh R4 shows the PWI version 01h means PWI1 0 and 02h means PWI2 0 R9 is the core voltage offset and the default value differs in LM10500SQ 0 8 and LM10500SQ 1 0 The default value of R9 is 00h in LM10500SQ 1 0 and 40h in LM10500SQ 0 8 The actual core voltage...

Page 9: ...rations then select Direct access to read in a register by providing its address as shown in Figure 9 5 Figure 9 4 Register Polling Setting In The GUI Figure 9 5 Direct Access Read Write In The GUI Register Write Click button W at the right end of a register to write this register to the LM10500 Click menu Operations then select Write all Ctrl W to write the current values in the GUI to all regist...

Page 10: ...oviding its address and value as shown in Figure 9 5 User s GUI for LM10500 Evaluation Board www ti com 10 LM10500 Step Down Converter Evaluation Module User s Guide SNVA453B AUGUST 2011 REVISED JANUARY 2022 Submit Document Feedback Copyright 2022 Texas Instruments Incorporated ...

Page 11: ...3 3V VOUT 1 8V VOUT 1 2V VOUT 0 8V Figure 10 3 Efficiency fS 300 kHz AVIN PVIN 5 V FPWM 0 0 1 2 3 4 5 50 55 60 65 70 75 80 85 90 95 100 EFFICIENCY LOAD CURRENT A VOUT 5V VOUT 3 3V VOUT 1 8V VOUT 1 2V VOUT 0 8V Figure 10 4 Efficiency fS 300 kHz AVIN PVIN 12V FPWM 0 3 5 7 9 11 13 15 17 0 10 0 05 0 00 0 05 0 10 LINE REGULATION INPUT VOLTAGE PVIN V Figure 10 5 Line Regulation 0 1 2 3 4 5 0 20 0 15 0 1...

Page 12: ...age 0 2V DIV EN 1V DIV 1 ms DIV 0 5V 1 2V Figure 10 10 Soft Start With 0 5V Pre bias Voltage DCM Operation Triggered By PWI Wakeup Command PWROK 0 5V DIV Inductor Current 0 5A DIV Output Voltage 0 2V DIV EN 1V DIV 1 ms DIV 0 5V 1 2V Figure 10 11 Soft Start With 0 5V Pre bias Voltage CCM Operation Triggered By PWI Wakeup Command Output Voltage 20 mV DIV AC coupling Inductor Current 1A DIV Switch No...

Page 13: ...c Part I Figure 11 2 LM10500 Evaluation Board Schematic Part II www ti com Evaluation Board Schematic SNVA453B AUGUST 2011 REVISED JANUARY 2022 Submit Document Feedback LM10500 Step Down Converter Evaluation Module User s Guide 13 Copyright 2022 Texas Instruments Incorporated ...

Page 14: ...KΩ 0603 1 RC0603FR 710KL 603 YAGEO R2 R3 R4 R5 R6 33Ω 0603 1 RC0603FR 0733RL 603 YAGEO R7 R8 1 5 KΩ 0603 1 RC0603FR 071K5L 603 YAGEO R9 R34 R35 R38 1Ω 0603 1 RC0603FR 071RL 603 YAGEO R10 R11 R12 R15 R16 R17 R18 R19 R30 R31 R32 R33 R37 R39 1KΩ 0603 1 RC0603FR 071KL 603 YAGEO R14 249Ω 0603 1 RC0603FR 07249RL 603 YAGEO R20 169 KΩ 0603 1 RC0603FR 07169KL 603 YAGEO R21 0 00Ω 0603 1 CRCW06030000Z0EA 603...

Page 15: ... 13 2 Middle Layer 1 Figure 13 3 Middle Layer 2 www ti com Evaluation Board Layout SNVA453B AUGUST 2011 REVISED JANUARY 2022 Submit Document Feedback LM10500 Step Down Converter Evaluation Module User s Guide 15 Copyright 2022 Texas Instruments Incorporated ...

Page 16: ...verlay Figure 13 6 Bottom Overlay Evaluation Board Layout www ti com 16 LM10500 Step Down Converter Evaluation Module User s Guide SNVA453B AUGUST 2011 REVISED JANUARY 2022 Submit Document Feedback Copyright 2022 Texas Instruments Incorporated ...

Page 17: ... 2022 Page Updated the numbering format for tables figures and cross references throughout the document 1 Updated user s guide title 1 Edited user s guide for clarity 1 www ti com Revision History SNVA453B AUGUST 2011 REVISED JANUARY 2022 Submit Document Feedback LM10500 Step Down Converter Evaluation Module User s Guide 17 Copyright 2022 Texas Instruments Incorporated ...

Page 18: ...other than TI b the nonconformity resulted from User s design specifications or instructions for such EVMs or improper system design or c User has not paid on time Testing and other quality control techniques are used to the extent TI deems necessary TI does not test all parameters of each EVM User s claims against TI under this Section 2 are void if User fails to notify TI of any apparent defects...

Page 19: ... These limits are designed to provide reasonable protection against harmful interference in a residential installation This equipment generates uses and can radiate radio frequency energy and if not installed and used in accordance with the instructions may cause harmful interference to radio communications However there is no guarantee that interference will not occur in a particular installation...

Page 20: ...y for convenience and should be verified by User 1 Use EVMs in a shielded room or any other test facility as defined in the notification 173 issued by Ministry of Internal Affairs and Communications on March 28 2006 based on Sub section 1 1 of Article 6 of the Ministry s Rule for Enforcement of Radio Law of Japan 2 Use EVMs only after User obtains the license of Test Radio Station as provided in R...

Page 21: ... any interfaces electronic and or mechanical between the EVM and any human body are designed with suitable isolation and means to safely limit accessible leakage currents to minimize the risk of electrical shock hazard User assumes all responsibility and liability for any improper or unsafe handling or use of the EVM by User or its employees affiliates contractors or designees 4 4 User assumes all...

Page 22: ...OR DAMAGES ARE CLAIMED THE EXISTENCE OF MORE THAN ONE CLAIM SHALL NOT ENLARGE OR EXTEND THIS LIMIT 9 Return Policy Except as otherwise provided TI does not offer any refunds returns or exchanges Furthermore no return of EVM s will be accepted if the package has been opened and no return of the EVM s will be accepted if they are damaged or otherwise not in a resalable condition If User feels it has...

Page 23: ...o change without notice TI grants you permission to use these resources only for development of an application that uses the TI products described in the resource Other reproduction and display of these resources is prohibited No license is granted to any other TI intellectual property right or to any third party intellectual property right TI disclaims responsibility for and you will fully indemn...

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