Texas Instruments Jacinto7, User Manual

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User’s Guide
Jacinto7 TDA4VE-Q1/TDA4VL-Q1/TDA4AL-Q1 Evaluation
Module (EVM)
Table of Contents
1 Introduction ............................................................................................................................................................................. 3
1.1 Inside the Box.................................................................................................................................................................... 3
1.2 Key Features...................................................................................................................................................................... 3
1.3 Thermal Compliance.......................................................................................................................................................... 4
1.4 Reach Compliance............................................................................................................................................................. 4
1.5 EMC, EMI, and ESD Compliance...................................................................................................................................... 4
2 User Interfaces ........................................................................................................................................................................ 5
2.1 Power Inputs...................................................................................................................................................................... 8
2.2 Power Input [J7_CP] with LED for Status [LD2_CP][LD3_CP].......................................................................................... 8
2.3 User Inputs......................................................................................................................................................................... 9
2.4 Standard Interfaces.......................................................................................................................................................... 12
2.5 Expansion Interfaces........................................................................................................................................................ 14
3 Circuit Details ........................................................................................................................................................................ 17
3.1 Top Level Diagram........................................................................................................................................................... 17
3.2 Interface Mapping............................................................................................................................................................ 19
3.3 I2C Address Mapping....................................................................................................................................................... 19
3.4 GPIO Mapping................................................................................................................................................................. 21
4 Revision History ................................................................................................................................................................... 28
List of Figures
Figure 2-1. TDA4VE-Q1/TDA4VL-Q1/TDA4AL-Q1 System on Module Component Identification.............................................. 5
Figure 2-2. Jacinto7 Common Processor Component Identification........................................................................................... 7
Figure 2-3. RJ45 LED Indicators [J35]....................................................................................................................................... 13
Figure 2-4. Audio Port Interface Assignment [J38,J40B & J41B].............................................................................................. 14
Figure 3-1. EVM Functional Block diagram............................................................................................................................... 18
List of Tables
Table 1-1. REACH Compliance................................................................................................................................................... 4
Table 2-1. Recommended External Power Supply...................................................................................................................... 9
Table 2-2. Power Domain Status................................................................................................................................................. 9
Table 2-3. Power Allocation......................................................................................................................................................... 9
Table 2-4. Dip Switch [SW3_CP] [SW13_CP] EVM Configuration Settings.............................................................................. 10
Table 2-5. EVM Configuration Switch Function......................................................................................................................... 10
Table 2-6. Dip Switch [SW9] Configuration for MCU_BOOTMODE........................................................................................... 11
Table 2-7. Dip Switch [SW8] Configuration for BOOTMODE..................................................................................................... 11
Table 2-8. Reset Pushbuttons.................................................................................................................................................... 11
Table 2-9. User Pushbuttons and LEDs..................................................................................................................................... 11
Table 2-10. UART to COM Port Mapping [J43] with Status [LD10]............................................................................................ 12
Table 2-11. UART to COM Port Mapping [J44] with Status [LD11]............................................................................................ 12
Table 2-12. Fan Header Pin Definition [J15].............................................................................................................................. 14
Table 2-13. CAN-FD Interface Assignment................................................................................................................................ 15
Table 2-14. CAN-FD Header Pin Definition............................................................................................................................... 15
Table 2-15. High Speed Camera Expansion Pin Definition [J52]............................................................................................... 15
Table 2-16. Test Automation Interface Pin Definition [J50]........................................................................................................ 16
Table 2-17. Accessory Power Connector [J42].......................................................................................................................... 17
Table 3-1. EVM Interface Mapping Table .................................................................................................................................. 19
Table 3-2. I2C Mapping Table.................................................................................................................................................... 19
Table 3-3. GPIO Mapping for Processor IO .............................................................................................................................. 21
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SPRUJ69 – DECEMBER 2022
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