Table 2-4. Dip Switch [SW3_CP] [SW13_CP] EVM Configuration Settings
[SW2]
Position
Default
Function
Description
SW3.1
OFF
Octal-SPI Memory Selection
MUX to select between non-volatile Octal-SPI memory
connected to the MCU_OSPI0 interface:
‘0’ (OFF) = xSPI Memory is selected
‘1’ (ON) = Octal-NAND is selected
SW3.2
ON
Debug/Trace Enable
MUX to select between Debug/Trace (connected via MIPI 60
emulation interface) and variety of ‘other’ EVM features (1):
‘0’ (OFF) = ‘Other’ EVM features are selected/enabled
‘1’ (ON) = Debug/Trace is enabled to MIPI-60 emulation
interface
SW3.[3:4]
OFF: OFF
USB Type C Mode Selection
Set Mode for USB Type C interface (USB0):
'00' (OFF/OFF) = DFP (Downstream Facing Port)
‘01’ (OFF/ON) = DRP (Dual Role Port)
‘1X’ (ON, Don’t Care) = UFP (Upstream Facing Port)
SW3.5
OFF
PCIe0 Mode Selection
Not used with J7AEP SOM
SW3.6
OFF
PCIe1 Mode Selection
Set Mode for PCIe1 (2-Lane)
‘0’ (OFF) = Root Complex
‘1’ (ON) = End Point
SW3.7
ON
IO Voltage for Serial Camera
Configures IO supply for Serial Camera interface.
‘0’ (OFF) = VCC_CSI_IO: 3.3V
‘1’ (ON) = VCC_CSI_IO: 1.8V
SW3.8
ON
Expansion board Selection
Switch is to be used on Expansion board. See specific
expansion board User’s Guide for definition. Not used with
J7AEP SOM
SW3.9
ON
EVM Configuration EEPROM Write
Protection
Sets EVM’s configuration EEPROM Write Protection
‘0’ (OFF) = Configuration EEPROM can be updated
‘1’ (ON) = Configuration EEPROM cannot be updated/protected
SW3.10
ON
User Defined
User Define, maps to IO Expander Input
‘0’ (OFF) = User Defined
‘1’ (ON) = User Defined
SW13.1
OFF
Reserved / Test Mode
(Wait Reset)
Reserved, must set to ‘0’ (OFF) for normal EVM operation (only
used in Test Mode)
SW13.2
OFF
Reserved / Test Mode
(Wait Reset)
Reserved, must set to ‘0’ (OFF) for normal EVM operation (only
used in Test Mode)
shows the J7AEP SOM configuration switches (SW3) to set the various functions on SOM.
Table 2-5. EVM Configuration Switch Function
Switch
Name
Default
Function
Operation
SW3.2
ON
Watchdog Disable
Enable/Disable selection for PMIC Watchdog Timer:
‘0’ (OFF) = PMIC watchdog timer is enabled
‘1’ (ON) = PMIC watchdog timer is disabled (Default)
SW3.1
ON
PMIC I2C Selection
MUX to select I2C Interface for PMICs:
‘0’ (OFF) = PMIC I2C to Ext header I2C (test mode only)
‘1’ (ON) = PMIC I2C to SoC WKUP I2C (Default)
2.3.2 Boot Configuration Settings [SW9_CP] [SW8_CP]
Dip switches [SW8] [SW9] are used to configure different boot options available on the processor.
User Interfaces
10
Jacinto7 TDA4VE-Q1/TDA4VL-Q1/TDA4AL-Q1 Evaluation Module (EVM)
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