Texas Instruments DS90UB953-Q1 User Manual Download Page 22

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board.WriteReg(0x5c,0x1c) #

print "SER_ALIAS_ID 0x5c value ", hex(board.ReadReg(0x5c))

time.sleep(0.1)

board.WriteReg(0x5d,0x60) #

print "SlaveID[0] 0x5d value ", hex(board.ReadReg(0x5d))

time.sleep(0.1)

board.WriteReg(0x65,0x66) #

print "SlaveAlias[0] 0x65 value ", hex(board.ReadReg(0x65))

time.sleep(0.1)

#########################################################

# 960_RX3_init_CSI0.py

print "CSI_PORT_SEL"

board.WriteReg(0x32,0x01) # CSI0 select

time.sleep(0.1)

print "CSI_PLL_CTL"

board.WriteReg(0x1f,0x02) # CSI0 800mbps

time.sleep(0.1)

print "CSI_EN"

board.WriteReg(0x33,0x1) # CSI_EN & CSI0 4L

time.sleep(0.1)

print "FWD_PORT"

board.WriteReg(0x20,0x70) # forwarding of RX 3 to CSI0

time.sleep(0.1)

print "FPD3_PORT_SEL"

board.WriteReg(0x4c,0x38) # RX_PORT3

time.sleep(0.1)

print "enable pass throu"

board.WriteReg(0x58,0x58) # enable pass throu

time.sleep(0.1)

board.WriteReg(0x5c,0x1e) #

print "SER_ALIAS_ID 0x5c value ", hex(board.ReadReg(0x5c))

time.sleep(0.1)

board.WriteReg(0x5d,0x60) #

print "SlaveID[0] 0x5d value ", hex(board.ReadReg(0x5d))

time.sleep(0.1)

board.WriteReg(0x65,0x68) #

print "SlaveAlias[0] 0x65 value ", hex(board.ReadReg(0x65))

time.sleep(0.1)

#########################################################

ALP Software Setup

www.ti.com

DS90UB960-Q1EVM User's Guide

SNLU226B – FEBRUARY 2018 – REVISED APRIL 2021

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Summary of Contents for DS90UB953-Q1

Page 1: ...Signals 12 6 5 I2C Interface 12 6 6 Control Interface 13 7 Enable and Reset 14 8 ALP Software Setup 15 8 1 System Requirements 15 8 2 Download Contents 15 8 3 Installation of the ALP Software 15 8 4 Startup Software Description 16 8 5 Information Tab 17 8 6 Registers Tab 18 8 7 Registers Tab Address 0x00 Selected 18 8 8 Registers Tab Address 0x00 Expanded 19 8 9 Scripting Tab 20 8 10 Sample ALP Py...

Page 2: ... Figure 17 4 Layer 3 Inner Signal 1 Layer 44 Figure 17 5 Layer 4 GND 2 Layer 45 Figure 17 6 Layer 5 GND 3 Layer 45 Figure 17 7 Layer 6 Inner Signal 2 Layer 46 Figure 17 8 Layer 7 GND 4 Layer 46 Figure 17 9 Layer 8 Bottom Signal Layer 47 Figure 17 10 Bottom Overlay 47 List of Tables Table 6 1 Power Supply 7 Table 6 2 Required PoC Network Updates for Compatibility to DS90UB913A Q1 and DS90UB933 Q1 S...

Page 3: ... four camera modules not included Each of the FPD Link III interfaces also includes a separate low latency bi directional control channel that conveys control information from an I2C port General purpose I O signals such as those required for camera synchronization and functional safety features also make use of this bi directional control channel to program registers in the DS90UB960 Q1 as well a...

Page 4: ...e receive equalization I2C with Fast mode Plus up to 1 Mbps Flexible GPIOs for camera sync and functional safety On board Power over Coax POC interface Quad Mini Fakra connector and Quad Mini Fakra to 4x Fakra coax cable assembly for FPD Link III interfaces Samtec QSH type connectors for CSI 2 interfaces On board I2C programming interface 3 Application Diagram MIPI CSI 2 Processor SoC DS90UB960 Q1...

Page 5: ...S90UB960 Q1EVM from a single 12V 1A supply 8 Connectors for selecting PoC voltage source FPD LINK III I O MIPI CSI 2 OUTPUTS FUNCTION CONTROLS USB2ANY CONNECTOR I2C BUS 1 2 3 4 5 GPIO 6 POWER SUPPLY 7 POC CONFIGURATION 8 1 2 2 3 4 5 6 7 8 Figure 4 1 Interfacing to the EVM To demonstrate the functionality the following components are also required not included 1 At least one DS90UB953 Q1EVM or a ca...

Page 6: ...a to 4x Single Fakra cable assembly 5 Optional Interface MIPI CSI 2 output signals J1 or J3 to application processor 6 Provide power to the board TI recommends using current limited bench supply to provide power to J30 barrel jack or J26 12VDC a Optional 1 1VDC power supply on J28 b Optional 1 8VDC power supply on J34 c Optional 3 3VDC power supply on J35 7 Open Analog LaunchPAD See Section 8 for ...

Page 7: ... applied over the coax cable from a 1A LDO Max 250 mA per PoC interface Refer to Table 6 3 for other PoC configurations Each PoC interface uses a filter network as shown in Figure 6 1 The PoC network frequency response corresponds to the bandwidth compatible with DS90UB935 Q1 and DS90UB953 Q1 serializers VPoC L1 C1 FB3 FB2 FB1 0 1 PF C2 10 PF R2 RIN RIN CAC1 CAC2 33 nF 100 nF 15 nF 47 nF 49 9 4 02...

Page 8: ...1 C1 2 k 4 k FB3 0 1 PF C2 10 PF R3 RIN RIN CAC1 CAC2 100 nF 47 nF 49 9 L2 4 7 PH 22 PH R1 100 PH R2 2 k 4 k FB2 FB1 Figure 6 2 Power over Coax Network Compatible with DS90UB913A Q1 DS90UB933 Q1 DS90UB935 Q1 and DS90UB953 Q1 Board Connections www ti com 8 DS90UB960 Q1EVM User s Guide SNLU226B FEBRUARY 2018 REVISED APRIL 2021 Submit Document Feedback Copyright 2021 Texas Instruments Incorporated ...

Page 9: ...n to CN1 Short J11 1 2 VFEED_POC1 Default Short J11 1 J12 1 VFEED_POC2 J11 3 VFEED2 Remote power supply connection to CN2 Short J11 3 4 VFEED_POC1 Default Short J11 3 J12 2 VFEED_POC2 J11 5 VFEED3 Remote power supply connection to CN3 Short J11 5 6 VFEED_POC1 Default Short J11 5 J12 3 VFEED_POC2 J11 7 VFEED4 Remote power supply connection to CN4 Short J11 7 8 VFEED_POC1 Default Short J11 7 J12 4 V...

Page 10: ...D 17 CSI0_D2_P 18 SPI_MOSI_0 GPIO0 or GPIO3 19 CSI0_D2_N 20 SPI_SCLK_0 GPIO1 or GPIO4 21 CSI0_D3_P 22 SPI_CSn_0 GPIO2 or GPIO5 23 CSI0_D3_N 24 GND 25 NC 26 NC 27 NC 28 NC 29 NC 30 VDD_3V3 31 NC 32 VDD_3V3 33 NC 34 VDD_3V3 35 NC 36 VDD_3V3 37 NC 38 VDD_1V8 39 NC 40 VDD_1V8 Table 6 5 MIPI CSI 2 TX Port 1 Output Signals J3 Pinout Pin Signal Name Pin Signal Name 1 NC 2 EXT_SCL1 I2C_SCL or I2C_SCL2 3 N...

Page 11: ...t Signals J2 Pinout Pin Signal Name Pin Signal Name 1 NC 2 EXP_SCL0 I2C_SCL or I2C_SCL2 3 NC 4 EXP_SDA0 I2C_SDA or I2C_SDA2 5 CSI0_CLK_P 6 NC 7 CSI0_CLK_N 8 NC 9 CSI0_D0_P 10 EXP_REF_CLK0 REFCLK 11 CSI0_D0_N 12 GND 13 CSI0_D1_P 14 RESETn_0 PDB 15 CSI0_D1_N 16 GND 17 CSI0_D2_P 18 SPI_MOSI_0 GPIO0 or GPIO3 19 CSI0_D2_N 20 SPI_SCLK_0 GPIO1 or GPIO4 21 CSI0_D3_P 22 SPI_CSn_0 GPIO2 or GPIO5 23 CSI0_D3_...

Page 12: ... USB2ANY and Total Phase Aardvark I2C SPI host adapter Total Phase Part TP240141 Optional access to I2C signals are also available throughCSI 2 connectors J1 J2 or J3 I2C signal levels can be configured through J30 to be at 1 8V or 3 3V when the I2C interface is accessed through connectors J4 J5 Table 6 8 IDx I2C Device Address Select J34 Reference Signal Description J7 IDX Selects I2C Device Addr...

Page 13: ... General Purpose Input Output 6 J8 16 GPIO7 General Purpose Input Output 7 Table 6 14 CMLOUTP Output Signals Reference Signal Description TP1 CMLOUTP Test Pad for Channel Monitor Loop through Driver TP2 CMLOUTN Test Pad for Channel Monitor Loop through Driver Table 6 15 Mode SW DIP4 S1 Reference Mode Description S1 1 1 CSI Mode DS90UB953 compatible Default S1 2 2 RAW12 LF DS90UB913A 933 compatible...

Page 14: ..._POC Power is ON D14 VDDIO Illuminates on VDDIO Power 7 Enable and Reset There are two device enable and reset power down options for the EVM RC timing option The C57 external capacitor and R78 pull up resistor connected to the PDB pin ramp time after the device is powered on External control option A push button S2 or SW1 position 2 is available for the manual control of the PBD signal Enable and...

Page 15: ...Next button 2 Select I accept the agreement and then select the Next button 3 Select the location to install the ALP software and then select the Next button 4 Select the location for the start menu shortcut and then select the Next button 5 There will then be a screen that allows the creation of a desktop icon After selecting the desired choices select the Next button 6 Select the Install button ...

Page 16: ...o start MainGUI exe Figure 8 1 Launching ALP The application must come up in the state shown in Figure 8 2 If it does not see Section 9 Troubleshooting ALP Software Under the Devices tab click on DS90UB960 or DS90UB960_ENG to select the device and open up the device profile and its associated tabs Figure 8 2 Initial ALP Screen ALP Software Setup www ti com 16 DS90UB960 Q1EVM User s Guide SNLU226B ...

Page 17: ...with DS90UB953 Q1 are connected to the EVM Figure 8 3 Follow up Screen 8 5 Information Tab The Information tab is shown below Figure 8 4 ALP Information Tab www ti com ALP Software Setup SNLU226B FEBRUARY 2018 REVISED APRIL 2021 Submit Document Feedback DS90UB960 Q1EVM User s Guide 17 Copyright 2021 Texas Instruments Incorporated ...

Page 18: ...ed Address 0x00 selected as shown in Figure 8 6 Note that the Value box will now show the hex value of that register Figure 8 6 ALP Device ID Selected ALP Software Setup www ti com 18 DS90UB960 Q1EVM User s Guide SNLU226B FEBRUARY 2018 REVISED APRIL 2021 Submit Document Feedback Copyright 2021 Texas Instruments Incorporated ...

Page 19: ...e box or putting the pointer into the individual register bit s box by a left mouse click to put a check mark indicating a 1 or unchecking to remove the check mark indicating a 0 Click the Apply button to write to the register and refresh to see the new value of the selected highlighted register The box toggles on every mouse click www ti com ALP Software Setup SNLU226B FEBRUARY 2018 REVISED APRIL...

Page 20: ...PIO0 to bring out Lock for Port0 print configure GPIO0 to bring out Lock for Port0 board WriteReg 0x10 0x81 time sleep 0 1 To configure GPIO1 to bring out Lock for Port1 print configure GPIO1 to bring out Lock for Port1 board WriteReg 0x11 0x85 time sleep 0 1 To configure GPIO2 to bring out Lock for Port2 print configure GPIO2 to bring out Lock for Port2 board WriteReg 0x12 0x89 time sleep 0 1 To ...

Page 21: ...warding of RX 1 to CSI0 time sleep 0 1 print FPD3_PORT_SEL board WriteReg 0x4c 0x12 RX_PORT1 time sleep 0 1 print enable pass throu board WriteReg 0x58 0x58 enable pass throu time sleep 0 1 board WriteReg 0x5c 0x1a print SER_ALIAS_ID 0x5c value hex board ReadReg 0x5c time sleep 0 1 board WriteReg 0x5d 0x60 print SlaveID 0 0x5d value hex board ReadReg 0x5d time sleep 0 1 board WriteReg 0x65 0x62 pr...

Page 22: ...e sleep 0 1 print FWD_PORT board WriteReg 0x20 0x70 forwarding of RX 3 to CSI0 time sleep 0 1 print FPD3_PORT_SEL board WriteReg 0x4c 0x38 RX_PORT3 time sleep 0 1 print enable pass throu board WriteReg 0x58 0x58 enable pass throu time sleep 0 1 board WriteReg 0x5c 0x1e print SER_ALIAS_ID 0x5c value hex board ReadReg 0x5c time sleep 0 1 board WriteReg 0x5d 0x60 print SlaveID 0 0x5d value hex board ...

Page 23: ... Incorrect Profile Find the correct profile under the Select a Daughter Board list highlight the profile and press Add If DS90UB960 ALP profile is not listed contact your TI representative to obtain it The ALP profiles are typically located in the ALP installation directory such as C Program Files x86 Texas Instruments Analog LaunchPAD v1 56 0010 Profiles www ti com Troubleshooting ALP Software SN...

Page 24: ...the correct profile must now be loaded Figure 9 4 Finish Setup Troubleshooting ALP Software www ti com 24 DS90UB960 Q1EVM User s Guide SNLU226B FEBRUARY 2018 REVISED APRIL 2021 Submit Document Feedback Copyright 2021 Texas Instruments Incorporated ...

Page 25: ...ow Figure 9 6 Windows 7 ALP USB2ANY Driver The software must start with only DS90UB960 or DS90UB960_ENG in the Devices pull down menu If there are more devices then the software is most likely in demo mode When the ALP is operating in demo mode there is a Demo Mode indication in the lower left of the application status bar as shown below www ti com Troubleshooting ALP Software SNLU226B FEBRUARY 20...

Page 26: ...will update and have only DS90UB960 or DS90UB960_ENG under the Devices pull down menu For additional information about using ALP software with FPD Link III device review the following training material Use of Analog Launch Pad ALP GUI to configure the FPD Link EVMs Troubleshooting ALP Software www ti com 26 DS90UB960 Q1EVM User s Guide SNLU226B FEBRUARY 2018 REVISED APRIL 2021 Submit Document Feed...

Page 27: ...ic termination board TI recommends the termination board is the UNH IOL MIPI D PHY Reference Termination Board RTB 12 Typical Test Setup Figure 12 1 and Figure 12 2 illustrate the typical test setups used to measure and evaluate DS90UB96X Q1 DS90UB960 EVM Board Contents of Demo Kit FPD Link III PoC Camera Sensor Serializer Board MIPI CSI 2 Applications Processor Display Figure 12 1 Typical Test Se...

Page 28: ...erOperability Laboratory UNH IOL www iol unh edu services testing mipi fixtures php Aardvark I2C SPI Host Adapter Part Number TP240141 www totalphase com products aardvark_i2cspi 14 Cable References FAKRA coaxial cable www leoni automotive cables com Rosenberger FAKRA connector http www rosenberger com en products automotive fakra php Equipment References www ti com 28 DS90UB960 Q1EVM User s Guide...

Page 29: ...06031C103KAT2A AVX CAP CERM 0 01 µF 100 V 10 X7R 0603 10 15 C54 C55 C87 C88 C91 C95 C101 C102 C104 C111 C112 C115 C116 C127 C128 GRM155R71C104KA 88D MuRata CAP CERM 0 1uF 16V 10 X7R 0402 11 5 C57 C94 C103 C113 C117 GRM21BR71A106KE 51L MuRata CAP CERM 10uF 10V 10 X7R 0805 12 4 C58 C59 C60 C61 GRM1555C1E4R7CA 01D MuRata CAP CERM 4 7pF 25V 5 C0G NP0 0402 13 8 C62 C64 C66 C68 C74 C76 C78 C80 C1005X7R1...

Page 30: ...26 GRM1885C2A300JA 01D MuRata CAP CERM 30 pF 100 V 5 C0G NP0 0603 30 1 C130 GRM188R71A474KA 61D MuRata CAP CERM 0 47uF 10V 10 X7R 0603 31 1 C131 C0603X222K5RACT U Kemet CAP CERM 2200pF 50V 10 X7R 0603 32 1 CN1 AMS22D 40MZ5 Z Rosenberger Plug 50 Ohm R A Gold TH 33 10 D1 D2 D3 D4 D5 D6 D7 D8 D9 D16 150060VS75000 Wurth Elektronik eiSos LED Green SMD 34 1 D10 1N5819HW 7 F Diodes Inc Diode Schottky 40V...

Page 31: ...mil 4x1 White TH 51 1 J11 TSW 104 07 G D Samtec Header 100mil 4x2 Gold TH 52 1 J12 TSW 104 07 G S Samtec Header 100mil 4x1 Gold TH 53 1 J15 TSW 102 07 G D Samtec Header 100mil 2x2 Gold TH 54 1 J30 PJ 102A CUI Inc Connector DC Jack 2 1X5 5 mm TH 55 1 J37 1734035 2 TE Connectivity Connector Receptacle Mini USB Type B R A Top Mount SMT 56 7 L1 L2 L3 L4 L5 L6 L7 BLM18SG121TN1D MuRata Ferrite Bead 120 ...

Page 32: ...RCW040225K5FKE D Vishay Dale RES 25 5 k 1 0 063 W 0402 73 7 R72 R103 R108 R111 R116 R120 R149 CRCW040210K0FKE D Vishay Dale RES 10 0 k 1 0 063 W 0402 74 1 R73 CRCW040297K6FKE D Vishay Dale RES 97 6 k 1 0 063 W 0402 75 1 R75 CRCW040295K3FKE D Vishay Dale RES 95 3 k 1 0 063 W 0402 76 1 R80 CRCW040240K2FKE D Vishay Dale RES 40 2 k 1 0 063 W 0402 77 4 R89 R91 R95 R97 CRCW06034K02FKE A Vishay Dale RES ...

Page 33: ...nector Solutions Shunt 100mil Flash Gold Black 95 1 SW1 219 2LPST CTS Electrocomponents Switch Slide SPST 2 poles SMT 96 1 T1 ACM9070 701 2PL TL01 TDK Coupled inductor 5 A 0 01 ohm SMD 97 1 U1 DS90UB960WRTDR Q1 Texas Instruments FPD Link III Camera Hub Deserializer RTD0064F VQFNP 64 98 3 U2 U4 U6 LM2941LD NOPB Texas Instruments 1A Low Dropout Adjustable Regulator 8 pin LLP Pb Free 99 1 U3 TPS54225...

Page 34: ...07 1 Y2 ABM3 24 000MHZ D2Y T Abracon Corporation Crystal 24 MHz 18 pF SMD 108 0 C6 C11 C25 C31 C39 CL21A106KAFN3NE Samsung Electro Mechanics CAP CERM 10 µF 25 V 10 X5R 0805 109 0 FID1 FID2 FID3 FID4 FID5 FID6 N A N A Fiducial mark There is nothing to buy or mount 110 0 J38 TSW 104 07 G D Samtec Header 100mil 4x2 Gold TH 111 0 J39 TSW 104 07 G S Samtec Header 100mil 4x1 Gold TH 112 0 J40 TSW 102 07...

Page 35: ... Dale RES 0 ohm 5 0 1W 0603 117 0 R66 504L50R0FTNCFT AT Ceramics RES 50 1 0 125 W AEC Q200 Grade 1 0402 118 0 R130 CRCW040210K0FKE D Vishay Dale RES 10 0k ohm 1 0 063W 0402 www ti com Bill of Materials SNLU226B FEBRUARY 2018 REVISED APRIL 2021 Submit Document Feedback DS90UB960 Q1EVM User s Guide 35 Copyright 2021 Texas Instruments Incorporated ...

Page 36: ...CSI1 PDB MODE IDx Strap Resistors Jumpers 1 1V REFCLK I2C Connector USB2ANY USB I2C Connector 9V 12V Supply Qua d Mini FAKRA Copyright 2018 Texas Instruments Incorporated PCB Schematics www ti com 36 DS90UB960 Q1EVM User s Guide SNLU226B FEBRUARY 2018 REVISED APRIL 2021 Submit Document Feedback Copyright 2021 Texas Instruments Incorporated ...

Page 37: ...m L6 GND 10µF C38 VDD1V1 VDDFPD_1V1 120 ohm L4 GND 10µF C24 VDDCSI_1V1 120 ohm L2 10µF C10 VDDL_1V1 GND 120 ohm L7 0 01µF C14 0 01µF C15 1µF C12 0 1µF C13 0 01µF C28 0 01µF C29 1µF C26 0 1µF C27 0 01µF C42 0 01µF C43 1µF C40 0 1µF C41 1µF C46 0 1µF C47 0 01µF C48 MODE IDX 10µF C30 GPIO0 GPIO1 GPIO2 GPIO3 GPIO4 GPIO5 GPIO6 GPIO7 100 R60 INTB 470 R62 GND 100k R68 VDD33 Green 2 1 D9 SHORTED I2C Addre...

Page 38: ... 40 MP1 MP2 MP3 MP4 J1 1 3 2 4 5 7 6 8 9 11 10 12 13 15 14 16 17 19 18 20 21 23 22 24 25 27 26 28 29 31 30 32 33 35 34 36 37 39 38 40 MP1 MP2 MP3 MP4 J3 GND GND Green 2 1 D1 Green 2 1 D2 220 R50 Green 2 1 D3 220 R51 Green 2 1 D4 220 R52 GPIO0 GPIO1 GPIO2 GPIO3 GND Green 2 1 D5 220 R53 Green 2 1 D6 220 R54 Green 2 1 D7 220 R56 Green 2 1 D8 220 R58 GPIO4 GPIO5 GPIO6 GPIO7 GPIO0 GPIO1 GPIO2 GPIO3 GPI...

Page 39: ... 4 02k R97 4 02k R95 1000 ohm L8 1000 ohm L9 10µH L10 10µH L12 1000 ohm L20 1000 ohm L21 10µH L22 10µH L24 CN1RIN0_P CN1RIN0_N CN2RIN1_P CN2RIN1_N CN4RIN3_N CN3RIN2_N CN4RIN3_P CN3RIN2_P 10µF C63 10µF C65 10µF C67 10µF C69 10µF C75 10µF C77 10µF C79 10µF C81 CN1RIN0_P CN2RIN1_P CN3RIN2_P CN4RIN3_P 100uH L11 0 R90 100uH L13 0 R92 100uH L23 0 R96 100uH L25 0 R98 1500 ohm L18 1500 ohm L16 1500 ohm L1...

Page 40: ... J25 Orange D13 J26 VDDIO 220 R140 GND Super Red 2 1 D14 0 R101 0 R109 22µF C105 GND 10 0k R120 3 24k R127 GND GND VDD_EXT VFEED_LDO2 J29 5 146261 1 GND 29 4k R125 9V 1A LDO POWER SUPPLY 0 R122 0 R119 VFEED_LDO1 VFEED_LDO2 GND 1 2 3 J22 VFEED_LDO2 VFEED_POC2 5V_SW J31 VFEED_LDO1 VFEED_LDO2 GND 1 2 3 4 J15 VDD_EXT 4 7µH L32 F1 4 7k R128 4 7k R115 IN 3 OUT 5 GND 7 ADJ 8 ON OFF 1 DAP 9 NC 4 NC 6 GND ...

Page 41: ...PIO5 SPI SOMI UART RXD GPIO4 SPI SIMO UART TXD 2200pF C131 GND 33k R152 0 1µF C132 0 1µF C133 0 47µF C130 GND GND 200 R148 0 1µF C124 GND GND 1 2 3 4 J40 GPIO7 PWM0 GPIO3 PWM2 EFC0 GPIO12 CLOCK GPIO11 VEREF GPIO10 VEREF GPIO8 ADC3 GPIO9 ADC2 1 2 3 Q2 BSL 2 3 4 1 5 J37 VBUS DM DP PUR VUSB 33 R144 33 R143 0 1µF C118 GND 1 2Meg R147 GND 1 5k R145 33k R146 GND 220pF C123 GND USB PORT GND OUT 1 NC 2 NR...

Page 42: ... 1 2 Assembly Note ZZ5 Place Shunt SH J2 on J7 1 2 Assembly Note ZZ14 Place Shunt SH J10 on J14 1 2 Assembly Note ZZ16 Place Shunt SH J13 on J20 1 2 Assembly Note ZZ15 Place Shunt SH J12 on J16 1 2 Assembly Note ZZ17 Place Shunt SH J14 on J27 1 2 Assembly Note ZZ18 Place Shunt SH J15 on J13 1 2 Assembly Note ZZ6 Place Shunt SH J3 on J18 1 2 Assembly Note ZZ8 Place Shunt SH J6 on J19 1 2 Assembly N...

Page 43: ...1 Top View Composite Figure 17 2 Layer 1 Top Signal Layer www ti com PCB Schematics SNLU226B FEBRUARY 2018 REVISED APRIL 2021 Submit Document Feedback DS90UB960 Q1EVM User s Guide 43 Copyright 2021 Texas Instruments Incorporated ...

Page 44: ...ND 1 Layer Figure 17 4 Layer 3 Inner Signal 1 Layer PCB Schematics www ti com 44 DS90UB960 Q1EVM User s Guide SNLU226B FEBRUARY 2018 REVISED APRIL 2021 Submit Document Feedback Copyright 2021 Texas Instruments Incorporated ...

Page 45: ...r 4 GND 2 Layer Figure 17 6 Layer 5 GND 3 Layer www ti com PCB Schematics SNLU226B FEBRUARY 2018 REVISED APRIL 2021 Submit Document Feedback DS90UB960 Q1EVM User s Guide 45 Copyright 2021 Texas Instruments Incorporated ...

Page 46: ...nner Signal 2 Layer Figure 17 8 Layer 7 GND 4 Layer PCB Schematics www ti com 46 DS90UB960 Q1EVM User s Guide SNLU226B FEBRUARY 2018 REVISED APRIL 2021 Submit Document Feedback Copyright 2021 Texas Instruments Incorporated ...

Page 47: ...8 Bottom Signal Layer Figure 17 10 Bottom Overlay www ti com PCB Schematics SNLU226B FEBRUARY 2018 REVISED APRIL 2021 Submit Document Feedback DS90UB960 Q1EVM User s Guide 47 Copyright 2021 Texas Instruments Incorporated ...

Page 48: ... to Revision A March 2018 Page Changed advance information to production data 3 Added a note to update PoC filters when interfacing to DS90UB913A Q1 and DS90UB933 Q1 serializers 7 Added Figure 6 2 7 Added Table 6 2 7 Updated Bill of Materials 29 Updated PCB Schematics 36 Updated Board Layout 43 Revision History www ti com 48 DS90UB960 Q1EVM User s Guide SNLU226B FEBRUARY 2018 REVISED APRIL 2021 Su...

Page 49: ...other than TI b the nonconformity resulted from User s design specifications or instructions for such EVMs or improper system design or c User has not paid on time Testing and other quality control techniques are used to the extent TI deems necessary TI does not test all parameters of each EVM User s claims against TI under this Section 2 are void if User fails to notify TI of any apparent defects...

Page 50: ... These limits are designed to provide reasonable protection against harmful interference in a residential installation This equipment generates uses and can radiate radio frequency energy and if not installed and used in accordance with the instructions may cause harmful interference to radio communications However there is no guarantee that interference will not occur in a particular installation...

Page 51: ...y for convenience and should be verified by User 1 Use EVMs in a shielded room or any other test facility as defined in the notification 173 issued by Ministry of Internal Affairs and Communications on March 28 2006 based on Sub section 1 1 of Article 6 of the Ministry s Rule for Enforcement of Radio Law of Japan 2 Use EVMs only after User obtains the license of Test Radio Station as provided in R...

Page 52: ... any interfaces electronic and or mechanical between the EVM and any human body are designed with suitable isolation and means to safely limit accessible leakage currents to minimize the risk of electrical shock hazard User assumes all responsibility and liability for any improper or unsafe handling or use of the EVM by User or its employees affiliates contractors or designees 4 4 User assumes all...

Page 53: ...OR DAMAGES ARE CLAIMED THE EXISTENCE OF MORE THAN ONE CLAIM SHALL NOT ENLARGE OR EXTEND THIS LIMIT 9 Return Policy Except as otherwise provided TI does not offer any refunds returns or exchanges Furthermore no return of EVM s will be accepted if the package has been opened and no return of the EVM s will be accepted if they are damaged or otherwise not in a resalable condition If User feels it has...

Page 54: ...s are subject to change without notice TI grants you permission to use these resources only for development of an application that uses the TI products described in the resource Other reproduction and display of these resources is prohibited No license is granted to any other TI intellectual property right or to any third party intellectual property right TI disclaims responsibility for and you wi...

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