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LVCMOS Output Connector Description (on DS90UB914AQ Board)
8
SNLU135B – June 2013 – Revised April 2016
Copyright © 2013–2016, Texas Instruments Incorporated
Board Setup Details
2.4
LVCMOS Output Connector Description (on DS90UB914AQ Board)
JP1 – ROUT[11:0], HSYNC, VSYNC, PCLKO are the pins of output connector for the LVCMOS interface
on Deserializer board. The even numbered pins are the output signals. All the odd numbered pins are
connected to VSS.
JP8 – GPIO0, GPIO1, GPIO2, GPIO3 are the access points for DS90UB914AQ GPIO data. Refer to
below.
JP1 and JP7 pins are not connected.
Figure 2-4. Parallel Output Connector on Deserializer Board