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1 Introduction

The DS320PR810-RSC-EVM evaluation module features four DS320PR810 linear redrivers that can extend the
transmission distance of a PCIe Gen-5 x16 bus. The evaluation module can directly be plugged into a PCIe slot
on a server or PC motherboard using one end of the board, and paired up with a PCIe add-in card using the
straddle mount connector attached to the other end of the board.

1.1 Features

The DS320PR810-RSC-EVM evaluation module includes the following:

• PCIe x16 Riser Card option with four 8-channel unidirectional linear redrivers operating at rates up to 32

Gbps

• Linear equalization for seamless support of link training and PCIe channel extension
• CTLE boosts up to 24 dB at 16 GHz
• Programmable device configuration through GPIO or I2C, SMBus
• Onboard 12-V to 3.3-V, 2-A step-down DC/DC converter
• Industrial temperature range: –40°C to 85°C
• Flow-through layout in 5.5 mm × 10 mm, 64-pin, lead-less WQFN 0.4-mm pitch package

1.2 Applications

The DS320PR810-RSC-EVM evaluation module includes the following:

• PCI Express Gen-1, 2, 3, 4, and 5
• High-speed interfaces up to 32 Gbps
• Enterprise server motherboard, workstation
• Enterprise storage
• Enterprise add-in card, end-point

www.ti.com

Introduction

SNLU297 – MAY 2021

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DS320PR810-RSC-EVM User's Guide

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Copyright © 2021 Texas Instruments Incorporated

Summary of Contents for DS320PR810-RSC-EVM

Page 1: ...lization Control 6 2 5 DS320PR810 RX Detect State Machine 7 2 6 DS320PR810 DC Gain Control 7 2 7 DS320PR810 EVM Global Controls 8 2 8 DS320PR810EVM Downstream Devices Control 9 2 9 DS320PR810EVM Upstr...

Page 2: ...2 Modes of Operation 4 Table 2 3 DS320PR810 SMBus Address Map 5 Table 2 4 Equalization Control Settings 6 Table 2 5 Four Level Control Pin Settings 7 Table 2 6 GAIN Control 7 Table 2 7 EVM Global Cont...

Page 3: ...at rates up to 32 Gbps Linear equalization for seamless support of link training and PCIe channel extension CTLE boosts up to 24 dB at 16 GHz Programmable device configuration through GPIO or I2C SMBu...

Page 4: ...k to GND L2 24 9 k to GND L3 75 k to GND L4 Float 2 2 DS320PR810 Modes of Operation Each DS320PR810 can be configured to operate in either Pin Mode SMBus with I2C Slave Mode or SMBus with I2C Master...

Page 5: ...resistor straps on the EQ0_0 ADDR1 and EQ1_0 ADDR0 pins as shown in Table 2 3 When multiple DS320PR810 devices are on the same SMBus interface bus each channel bank of each device must be configured...

Page 6: ...VEL CTLE BOOST AT 8 GHz dB CTLE BOOST AT 16 GHz dB 0 L0 L0 0 0 1 L0 L1 1 2 2 0 2 L0 L2 2 4 4 0 3 L0 L3 3 6 6 0 4 L0 L4 4 8 8 0 5 L1 L0 5 6 10 0 6 L1 L1 6 2 11 0 7 L1 L2 6 9 12 0 8 L1 L3 7 5 13 0 9 L1...

Page 7: ...e Detect Hi Z Post Detect 50 Pre Detect Hi Z Post Detect 50 Outputs poll until 2 consecutive valid detections L L L3 N A N A Reserved L L L4 Float Pre Detect Hi Z Post Detect 50 Pre Detect Hi Z Post D...

Page 8: ...bled PWDN floating Tie PCIe system PRSNT signal to PWDN using J6 for the PWDN control optional for PCIe use case J5 3x1 Header Access point to the WP write protect pin of the onboard EEPROM devices WP...

Page 9: ...9 16 for configuring EQ0_1 pin of Bank 1 of DS1 device Use pins 17 24 for configuring EQ0_0 pin of Bank 0 of DS2 device Use pins 25 32 for configuring EQ0_1 pin of Bank 1 of DS2 device SMBus I2C Mode...

Page 10: ...figuring EQ0_1 pin of Bank 1 of US1 device Use pins 17 24 for configuring EQ0_0 pin of Bank 0 of US2 device Use pins 25 32 for configuring EQ0_1 pin of Bank 1 of US2 device SMBus I2C Modes ADDR0 contr...

Page 11: ...placing shunts in the following arrangement On J15 connector place shunts in L0 locations for all downstream devices DS1_0 and DS2_0 DS1_1 and DS2_1 are a Don t Care On J16 connector place shunts in L...

Page 12: ...Figure 2 1 SigCon Architect DS320PR810 High Level Page Description www ti com 12 DS320PR810 RSC EVM User s Guide SNLU297 MAY 2021 Submit Document Feedback Copyright 2021 Texas Instruments Incorporated...

Page 13: ...Redriver EVM 10 WHQGHU DUG Server Motherboard PCIe Gen 4 CPU 8 WHQGHU DUG 6 WHQGHU DUG Figure 3 1 Example Test Setup Figure 3 2 is a typical test result achieved with a system shown in Figure 3 1 As...

Page 14: ...ough Figure 4 8 illustrate the EVM schematics Figure 4 1 Top Level Schematic Page Schematics www ti com 14 DS320PR810 RSC EVM User s Guide SNLU297 MAY 2021 Submit Document Feedback Copyright 2021 Texa...

Page 15: ...Figure 4 2 Control and Status Schematic Page www ti com Schematics SNLU297 MAY 2021 Submit Document Feedback DS320PR810 RSC EVM User s Guide 15 Copyright 2021 Texas Instruments Incorporated...

Page 16: ...Figure 4 3 Voltage Regulator Schematic Page Schematics www ti com 16 DS320PR810 RSC EVM User s Guide SNLU297 MAY 2021 Submit Document Feedback Copyright 2021 Texas Instruments Incorporated...

Page 17: ...Figure 4 4 Gold Finger Connector Schematic Page www ti com Schematics SNLU297 MAY 2021 Submit Document Feedback DS320PR810 RSC EVM User s Guide 17 Copyright 2021 Texas Instruments Incorporated...

Page 18: ...Figure 4 5 Downstream Devices Schematic Page Schematics www ti com 18 DS320PR810 RSC EVM User s Guide SNLU297 MAY 2021 Submit Document Feedback Copyright 2021 Texas Instruments Incorporated...

Page 19: ...Figure 4 6 Upstream Devices Schematic Page www ti com Schematics SNLU297 MAY 2021 Submit Document Feedback DS320PR810 RSC EVM User s Guide 19 Copyright 2021 Texas Instruments Incorporated...

Page 20: ...Figure 4 7 Straddle Connector Schematic Page Schematics www ti com 20 DS320PR810 RSC EVM User s Guide SNLU297 MAY 2021 Submit Document Feedback Copyright 2021 Texas Instruments Incorporated...

Page 21: ...Figure 4 8 Hardware Page www ti com Schematics SNLU297 MAY 2021 Submit Document Feedback DS320PR810 RSC EVM User s Guide 21 Copyright 2021 Texas Instruments Incorporated...

Page 22: ...ure 5 2 illustrate the EVM board layouts Figure 5 1 Top Layer Figure 5 2 Bottom Layer Board Layout www ti com 22 DS320PR810 RSC EVM User s Guide SNLU297 MAY 2021 Submit Document Feedback Copyright 202...

Page 23: ...47 uF 6 3 V 10 X7R 0603 0603 C0603C474K9RACTU Kemet C17 1 0 1uF CAP CERM 0 1 uF 10 V 10 X7R 0603 0603 C0603C104K8RACTU Kemet C18 C19 C20 C21 C22 C23 C24 C25 C26 C27 C28 C29 C30 C31 C32 C33 C34 C35 C36...

Page 24: ...0402 ERJ 2RKF2490X Panasonic R6 R9 R26 3 2 05k RES 2 05 k 1 0 063 W AEC Q200 Grade 0 0402 402 CRCW04022K05FKED Vishay Dale R7 R10 2 6 19k RES 6 19 k 1 0 063 W AEC Q200 Grade 0 0402 402 CRCW04026K19FK...

Page 25: ...0 063 W AEC Q200 Grade 0 0402 0402 CRCW040275K0FKED Vishay Dale R118 1 100 RES 100 1 0 063 W AEC Q200 Grade 0 0402 0402 CRCW0402100RFKED Vishay Dale SH J1 SH J2 SH J3 SH J4 SH J5 SH J6 SH J7 SH J8 SH...

Page 26: ...press 4 0 Linear Redriver data sheet 2 Texas Instruments DS320PR810 Programming Guide 3 Texas Instruments CEMsSLIMSAS EVM Evaluation Module user s guide References www ti com 26 DS320PR810 RSC EVM Use...

Page 27: ...ther than TI b the nonconformity resulted from User s design specifications or instructions for such EVMs or improper system design or c User has not paid on time Testing and other quality control tec...

Page 28: ...These limits are designed to provide reasonable protection against harmful interference in a residential installation This equipment generates uses and can radiate radio frequency energy and if not in...

Page 29: ...instructions set forth by Radio Law of Japan which includes but is not limited to the instructions below with respect to EVMs which for the avoidance of doubt are stated strictly for convenience and s...

Page 30: ...any interfaces electronic and or mechanical between the EVM and any human body are designed with suitable isolation and means to safely limit accessible leakage currents to minimize the risk of electr...

Page 31: ...R DAMAGES ARE CLAIMED THE EXISTENCE OF MORE THAN ONE CLAIM SHALL NOT ENLARGE OR EXTEND THIS LIMIT 9 Return Policy Except as otherwise provided TI does not offer any refunds returns or exchanges Furthe...

Page 32: ...are subject to change without notice TI grants you permission to use these resources only for development of an application that uses the TI products described in the resource Other reproduction and...

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