Texas Instruments DS320PR810-RSC-EVM User Manual Download Page 27

STANDARD TERMS FOR EVALUATION MODULES

1.

Delivery:

TI delivers TI evaluation boards, kits, or modules, including any accompanying demonstration software, components, and/or

documentation which may be provided together or separately (collectively, an “EVM” or “EVMs”) to the User (“User”) in accordance
with the terms set forth herein. User's acceptance of the EVM is expressly subject to the following terms.

1.1

EVMs are intended solely for product or software developers for use in a research and development setting to facilitate feasibility
evaluation, experimentation, or scientific analysis of TI semiconductors products. EVMs have no direct function and are not
finished products. EVMs shall not be directly or indirectly assembled as a part or subassembly in any finished product. For
clarification, any software or software tools provided with the EVM (“Software”) shall not be subject to the terms and conditions
set forth herein but rather shall be subject to the applicable terms that accompany such Software

1.2

EVMs are not intended for consumer or household use. EVMs may not be sold, sublicensed, leased, rented, loaned, assigned,
or otherwise distributed for commercial purposes by Users, in whole or in part, or used in any finished product or production
system.

2

Limited Warranty and Related Remedies/Disclaimers

:

2.1

These terms do not apply to Software. The warranty, if any, for Software is covered in the applicable Software License
Agreement.

2.2

TI warrants that the TI EVM will conform to TI's published specifications for ninety (90) days after the date TI delivers such EVM
to User. Notwithstanding the foregoing, TI shall not be liable for a nonconforming EVM if (a) the nonconformity was caused by
neglect, misuse or mistreatment by an entity other than TI, including improper installation or testing, or for any EVMs that have
been altered or modified in any way by an entity other than TI, (b) the nonconformity resulted from User's design, specifications
or instructions for such EVMs or improper system design, or (c) User has not paid on time. Testing and other quality control
techniques

are

used

to

the

extent

TI

deems

necessary.

TI

does

not

test

all

parameters

of

each

EVM.

User's claims against TI under this Section 2 are void if User fails to notify TI of any apparent defects in the EVMs within ten (10)
business days after delivery, or of any hidden defects with ten (10) business days after the defect has been detected.

2.3

TI's sole liability shall be at its option to repair or replace EVMs that fail to conform to the warranty set forth above, or credit
User's account for such EVM. TI's liability under this warranty shall be limited to EVMs that are returned during the warranty
period to the address designated by TI and that are determined by TI not to conform to such warranty. If TI elects to repair or
replace such EVM, TI shall have a reasonable time to repair such EVM or provide replacements. Repaired EVMs shall be
warranted for the remainder of the original warranty period. Replaced EVMs shall be warranted for a new full ninety (90) day
warranty period.

WARNING

Evaluation Kits are intended solely for use by technically qualified,

professional electronics experts who are familiar with the dangers

and application risks associated with handling electrical mechanical

components, systems, and subsystems.

User shall operate the Evaluation Kit within TI’s recommended

guidelines and any applicable legal or environmental requirements

as well as reasonable and customary safeguards. Failure to set up

and/or operate the Evaluation Kit within TI’s recommended

guidelines may result in personal injury or death or property

damage. Proper set up entails following TI’s instructions for

electrical ratings of interface circuits such as input, output and

electrical loads.

NOTE:

EXPOSURE TO ELECTROSTATIC DISCHARGE (ESD) MAY CAUSE DEGREDATION OR FAILURE OF THE EVALUATION
KIT; TI RECOMMENDS STORAGE OF THE EVALUATION KIT IN A PROTECTIVE ESD BAG.

Summary of Contents for DS320PR810-RSC-EVM

Page 1: ...lization Control 6 2 5 DS320PR810 RX Detect State Machine 7 2 6 DS320PR810 DC Gain Control 7 2 7 DS320PR810 EVM Global Controls 8 2 8 DS320PR810EVM Downstream Devices Control 9 2 9 DS320PR810EVM Upstr...

Page 2: ...2 Modes of Operation 4 Table 2 3 DS320PR810 SMBus Address Map 5 Table 2 4 Equalization Control Settings 6 Table 2 5 Four Level Control Pin Settings 7 Table 2 6 GAIN Control 7 Table 2 7 EVM Global Cont...

Page 3: ...at rates up to 32 Gbps Linear equalization for seamless support of link training and PCIe channel extension CTLE boosts up to 24 dB at 16 GHz Programmable device configuration through GPIO or I2C SMBu...

Page 4: ...k to GND L2 24 9 k to GND L3 75 k to GND L4 Float 2 2 DS320PR810 Modes of Operation Each DS320PR810 can be configured to operate in either Pin Mode SMBus with I2C Slave Mode or SMBus with I2C Master...

Page 5: ...resistor straps on the EQ0_0 ADDR1 and EQ1_0 ADDR0 pins as shown in Table 2 3 When multiple DS320PR810 devices are on the same SMBus interface bus each channel bank of each device must be configured...

Page 6: ...VEL CTLE BOOST AT 8 GHz dB CTLE BOOST AT 16 GHz dB 0 L0 L0 0 0 1 L0 L1 1 2 2 0 2 L0 L2 2 4 4 0 3 L0 L3 3 6 6 0 4 L0 L4 4 8 8 0 5 L1 L0 5 6 10 0 6 L1 L1 6 2 11 0 7 L1 L2 6 9 12 0 8 L1 L3 7 5 13 0 9 L1...

Page 7: ...e Detect Hi Z Post Detect 50 Pre Detect Hi Z Post Detect 50 Outputs poll until 2 consecutive valid detections L L L3 N A N A Reserved L L L4 Float Pre Detect Hi Z Post Detect 50 Pre Detect Hi Z Post D...

Page 8: ...bled PWDN floating Tie PCIe system PRSNT signal to PWDN using J6 for the PWDN control optional for PCIe use case J5 3x1 Header Access point to the WP write protect pin of the onboard EEPROM devices WP...

Page 9: ...9 16 for configuring EQ0_1 pin of Bank 1 of DS1 device Use pins 17 24 for configuring EQ0_0 pin of Bank 0 of DS2 device Use pins 25 32 for configuring EQ0_1 pin of Bank 1 of DS2 device SMBus I2C Mode...

Page 10: ...figuring EQ0_1 pin of Bank 1 of US1 device Use pins 17 24 for configuring EQ0_0 pin of Bank 0 of US2 device Use pins 25 32 for configuring EQ0_1 pin of Bank 1 of US2 device SMBus I2C Modes ADDR0 contr...

Page 11: ...placing shunts in the following arrangement On J15 connector place shunts in L0 locations for all downstream devices DS1_0 and DS2_0 DS1_1 and DS2_1 are a Don t Care On J16 connector place shunts in L...

Page 12: ...Figure 2 1 SigCon Architect DS320PR810 High Level Page Description www ti com 12 DS320PR810 RSC EVM User s Guide SNLU297 MAY 2021 Submit Document Feedback Copyright 2021 Texas Instruments Incorporated...

Page 13: ...Redriver EVM 10 WHQGHU DUG Server Motherboard PCIe Gen 4 CPU 8 WHQGHU DUG 6 WHQGHU DUG Figure 3 1 Example Test Setup Figure 3 2 is a typical test result achieved with a system shown in Figure 3 1 As...

Page 14: ...ough Figure 4 8 illustrate the EVM schematics Figure 4 1 Top Level Schematic Page Schematics www ti com 14 DS320PR810 RSC EVM User s Guide SNLU297 MAY 2021 Submit Document Feedback Copyright 2021 Texa...

Page 15: ...Figure 4 2 Control and Status Schematic Page www ti com Schematics SNLU297 MAY 2021 Submit Document Feedback DS320PR810 RSC EVM User s Guide 15 Copyright 2021 Texas Instruments Incorporated...

Page 16: ...Figure 4 3 Voltage Regulator Schematic Page Schematics www ti com 16 DS320PR810 RSC EVM User s Guide SNLU297 MAY 2021 Submit Document Feedback Copyright 2021 Texas Instruments Incorporated...

Page 17: ...Figure 4 4 Gold Finger Connector Schematic Page www ti com Schematics SNLU297 MAY 2021 Submit Document Feedback DS320PR810 RSC EVM User s Guide 17 Copyright 2021 Texas Instruments Incorporated...

Page 18: ...Figure 4 5 Downstream Devices Schematic Page Schematics www ti com 18 DS320PR810 RSC EVM User s Guide SNLU297 MAY 2021 Submit Document Feedback Copyright 2021 Texas Instruments Incorporated...

Page 19: ...Figure 4 6 Upstream Devices Schematic Page www ti com Schematics SNLU297 MAY 2021 Submit Document Feedback DS320PR810 RSC EVM User s Guide 19 Copyright 2021 Texas Instruments Incorporated...

Page 20: ...Figure 4 7 Straddle Connector Schematic Page Schematics www ti com 20 DS320PR810 RSC EVM User s Guide SNLU297 MAY 2021 Submit Document Feedback Copyright 2021 Texas Instruments Incorporated...

Page 21: ...Figure 4 8 Hardware Page www ti com Schematics SNLU297 MAY 2021 Submit Document Feedback DS320PR810 RSC EVM User s Guide 21 Copyright 2021 Texas Instruments Incorporated...

Page 22: ...ure 5 2 illustrate the EVM board layouts Figure 5 1 Top Layer Figure 5 2 Bottom Layer Board Layout www ti com 22 DS320PR810 RSC EVM User s Guide SNLU297 MAY 2021 Submit Document Feedback Copyright 202...

Page 23: ...47 uF 6 3 V 10 X7R 0603 0603 C0603C474K9RACTU Kemet C17 1 0 1uF CAP CERM 0 1 uF 10 V 10 X7R 0603 0603 C0603C104K8RACTU Kemet C18 C19 C20 C21 C22 C23 C24 C25 C26 C27 C28 C29 C30 C31 C32 C33 C34 C35 C36...

Page 24: ...0402 ERJ 2RKF2490X Panasonic R6 R9 R26 3 2 05k RES 2 05 k 1 0 063 W AEC Q200 Grade 0 0402 402 CRCW04022K05FKED Vishay Dale R7 R10 2 6 19k RES 6 19 k 1 0 063 W AEC Q200 Grade 0 0402 402 CRCW04026K19FK...

Page 25: ...0 063 W AEC Q200 Grade 0 0402 0402 CRCW040275K0FKED Vishay Dale R118 1 100 RES 100 1 0 063 W AEC Q200 Grade 0 0402 0402 CRCW0402100RFKED Vishay Dale SH J1 SH J2 SH J3 SH J4 SH J5 SH J6 SH J7 SH J8 SH...

Page 26: ...press 4 0 Linear Redriver data sheet 2 Texas Instruments DS320PR810 Programming Guide 3 Texas Instruments CEMsSLIMSAS EVM Evaluation Module user s guide References www ti com 26 DS320PR810 RSC EVM Use...

Page 27: ...ther than TI b the nonconformity resulted from User s design specifications or instructions for such EVMs or improper system design or c User has not paid on time Testing and other quality control tec...

Page 28: ...These limits are designed to provide reasonable protection against harmful interference in a residential installation This equipment generates uses and can radiate radio frequency energy and if not in...

Page 29: ...instructions set forth by Radio Law of Japan which includes but is not limited to the instructions below with respect to EVMs which for the avoidance of doubt are stated strictly for convenience and s...

Page 30: ...any interfaces electronic and or mechanical between the EVM and any human body are designed with suitable isolation and means to safely limit accessible leakage currents to minimize the risk of electr...

Page 31: ...R DAMAGES ARE CLAIMED THE EXISTENCE OF MORE THAN ONE CLAIM SHALL NOT ENLARGE OR EXTEND THIS LIMIT 9 Return Policy Except as otherwise provided TI does not offer any refunds returns or exchanges Furthe...

Page 32: ...are subject to change without notice TI grants you permission to use these resources only for development of an application that uses the TI products described in the resource Other reproduction and...

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