Setup
8
SNLU158A – January 2014 – Revised January 2016
Copyright © 2014–2016, Texas Instruments Incorporated
DS125DF111EVM Evaluation Board
Table 3. DS125DF111 DEM Levels (continued)
DEMA/B
Reg 0x15
Bit [2]
Reg 0x15
Bit [1]
Reg 0x15
Bit [0]
Reg 0x15
Bit [6]
De-Emphasis (dB)
F
0
1
0
0
-3.5
1
0
1
1
-3.9
1
1
0
1
-4.5
0
1
1
0
-5.0
1
1
1
1
-5.6
1
1
0
0
0
-6.0
1
0
1
0
-7.5
1
1
0
0
-9.0
1
1
1
0
-12.0
5.1.3
Equalization
There are no pin control settings for the input equalization. The DS125DF111 input equalization will
automatically adapt for divide ratios 1 and 2. For divide ratios 4 and 8, a pre-set equalization level is used.
5.1.4
Loopback
J6 and J61 control the DS125DF111EVM loopback function according to
Table 4. DS125DF111 Loopback Control
Loopback
Mode of Operation
IN A
IN B
0
Loopback
Output B
Output A
R
Fanout Input A
Output A
Output A
F
Fanout Input B
Output B
Output B
1
Normal Operation
Output A
Output B
5.1.5
LOS and LOCK
•
LOS Function: The LOS function monitors the input of channel A for a valid signal. When there is a
valid signal on input A the LED will light up. Channel B does not have any effect on the LOS output
signal.
•
LOCK Function: The LOCK function monitors both channel A and channel B for a valid lock condition.
If either channel has a valid lock the LED will light up.
