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Overview of EVM
9
SLOU403C – March 2015 – Revised June 2018
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Copyright © 2015–2018, Texas Instruments Incorporated
DRV2700EVM High Voltage Piezo Driver Evaluation Kit
2.4
EN and Gain Configuration
The EN, GAIN0, and GAIN1 inputs into the DRV2700 have 4 different driving configurations:
•
Driven through the MSP430. This is done by connecting the configuration jumper to the “MSP” state
(default).
•
Pulled to a logic level high through pullup resistor. This is done by connecting the configuration jumper
to the “PU” state.
•
Pulled to a logic level low through internal pulldown resistor. This is done by removing the configuration
jumper.
•
Driven externally. This is done by connecting the external control signal to the center 100-mil header.
Each of these signals have an LED to indicate when the signal is at a logic-level high.
Additionally, the GAIN pins control the internal gain of the high voltage amplifier.
Table 3
shows the 4 gain
settings
Table 3. Gain Settings
GAIN1
GAIN0
Gain (dB)
Low
Low
28.8
Low
High
34.8
High
Low
38.4
High
High
40.7
Figure 3
through
Figure 6
showcase all 4 gain settings with BST set to max of 105 V (JP2, JP3, and JP4
closed). C3 = BST, C1 = VOUT(+), C2 = VOUT(–), and MATH = OUT(+) – OUT (–). PWM input from
MSP430 of 0–3.3 V, 300 Hz and 50% duty cycle.
Figure 3. Gain = 40.7 dB
Figure 4. Gain = 38.4 dB
