background image

Flip Disabled

Flip Enabled

DMD

Figure 2-1. Image Long-Axis Flip Example

2.3.4.2 Short Axis Image Flip

The Short-Axis Image Flip defines whether the input image is flipped across the short axis of the DMD. If this 
parameter is changed while displaying a still image, re-send the input still image. If the image is not re-sent, the 
output image might be slightly corrupted. 

Figure 2-2

 shows an example of a short axis image flip. In Structured 

Light mode, the image flip takes effect on the next bit-plane, image, or video frame load.

Table 2-58. Short Axis Image Flip Command

I

2

C

USB

Read

Write

0x1009

0x09

0x89

Table 2-59. Short-Axis Image Flip Command Definition

BYTE

BITS

DESCRIPTION

RESET

TYPE

0

0

Flips image along the short side of the DMD:

d0

wr

0 - Disable flip

1 - Enable flip

7:1

Reserved

d0

r

Flip Disabled

Flip Enabled

DMD

Figure 2-2. Image Short-Axis Flip Example

2.3.5 IT6535 Power Mode

The IT6535 Power Mode command allows the user to power-down and tri-state the IT6535 digital receiver data 
and sync outputs. This command is ignored if the IT6535 is not present or has been disabled.

Table 2-60. IT6535 Power Mode Command

I

2

C

USB

Read

Write

0x1A01

0x0C

0x8C

DLPC900 Control Commands

www.ti.com

40

DLPC900 Programmer's Guide

DLPU018G – OCTOBER 2014 – REVISED APRIL 2022

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Summary of Contents for DLP LightCrafter Dual DLPC900

Page 1: ...DLPC900 Programmer s Guide Programmer s Guide Literature Number DLPU018G OCTOBER 2014 REVISED APRIL 2022 ...

Page 2: ......

Page 3: ...re Version 22 2 1 5 Reading Hardware Configuration and Firmware Tag Information 22 2 1 6 Read Error Code 23 2 1 7 Read Error Description 23 2 2 DLPC900 Firmware Programming Commands 24 2 2 1 Read Status 24 2 2 2 Enter Program Mode 27 2 2 3 Exit Program Mode 27 2 2 4 Read Control 28 2 2 5 Start Address 28 2 2 6 Erase Sector 29 2 2 7 Download Flash Data Size 29 2 2 8 Download Data 29 2 2 9 Calculate...

Page 4: ...election 57 2 4 1 1 Video Mode Resolution 58 2 4 1 2 Input Display Resolution 58 2 4 1 3 DMD Block Load 58 2 4 1 4 Minimum Exposure Times 59 2 4 1 5 DMD Idle Mode 60 2 4 2 Image Header 61 2 4 3 Pattern Image Compression 61 2 4 3 1 Run Length Encoding 61 2 4 3 2 Enhanced Run Length Encoding 62 2 4 4 Pattern Display Commands 63 2 4 4 1 Trigger Commands 63 2 4 4 2 LED Enable Delay Commands 66 2 4 4 3...

Page 5: ...ample 40 Figure 2 3 Gamma Chart 42 Figure 2 4 DLPC900 Single Controller System Block Diagram 54 Figure 2 5 DLPC900 Dual Controller System Block Diagram 55 Figure 2 6 Bit Planes of a 24 Bit RGB Image 56 Figure 2 7 Bit Partition in a Frame for an 8 Bit Monochrome Image 56 Figure 2 8 Video Pattern Mode Timing Diagram Example 64 Figure 2 9 Pre Stored Pattern Mode Timing Diagram Example 64 Figure 3 1 D...

Page 6: ...able of Contents www ti com 6 DLPC900 Programmer s Guide DLPU018G OCTOBER 2014 REVISED APRIL 2022 Submit Document Feedback Copyright 2022 Texas Instruments Incorporated This page intentionally left blank ...

Page 7: ...LP is a registered trademark of Texas Instruments All trademarks are the property of their respective owners www ti com Trademarks DLPU018G OCTOBER 2014 REVISED APRIL 2022 Submit Document Feedback DLPC900 Programmer s Guide 7 Copyright 2022 Texas Instruments Incorporated ...

Page 8: ...Trademarks www ti com 8 DLPC900 Programmer s Guide DLPU018G OCTOBER 2014 REVISED APRIL 2022 Submit Document Feedback Copyright 2022 Texas Instruments Incorporated This page intentionally left blank ...

Page 9: ...Data Sheet DLPS053 DLP670S Data Sheet DLPS194 DLP9000 Data Sheet DLPS036 DLP LightCrafter Single DLPC900 Controller Evaluation Module EVM User s Guide DLPU101 DLP LightCrafter Dual DLPC900 Controller Evaluation Module EVM User s Guide DLPU102 If You Need Assistance Visit the TI E2E support forums at DLP Products and MEMS TI E2E Community Preface Read This First www ti com Read This First DLPU018G ...

Page 10: ...ead This First www ti com 10 DLPC900 Programmer s Guide DLPU018G OCTOBER 2014 REVISED APRIL 2022 Submit Document Feedback Copyright 2022 Texas Instruments Incorporated This page intentionally left blank ...

Page 11: ...nsactions begin with a START condition A START condition is defined by a high to low transition on the SDA line followed by a high to low transition on the SCL line 1 1 1 2 I2C STOP Condition All I2C transactions end with a STOP condition A STOP condition is defined by a low to high transition on the SDA line followed by a low to high transition on the SCL line 1 1 1 3 DLPC900 I2C Secondary Contro...

Page 12: ...mand executed See Section 1 1 2 for a Read command example 1 1 2 Example I2C Read Command Sequence To execute a command to read the Input Data Channel Swap setting the host builds a sequence of bytes containing the Secondary address the sub address and the data if any and performs the following steps 1 The host performs the required START condition followed by sending the sequence of bytes 2 The D...

Page 13: ... 1 All values shown are in HEX notation 1 1 3 Example I2C Write Command Sequence To execute a command to set the Input Data Channel Swap value the host builds a sequence of bytes containing the Secondary address the sub address and the data and performs the following steps 1 The host performs the required START condition followed by sending the sequence of bytes 2 The host performs a STOP conditio...

Page 14: ...yte Sequence Byte Length LSB Payload Bytes USB Command LSB MSB Data R W Reply Error Reserved Destination Byte 0 Byte 1 Byte 2 Byte 3 Byte 4 Bytes 5 N USB Transaction Sequence Bit 7 Bit 6 Bit 5 Bit 4 3 Bit 2 0 Length MSB Figure 1 4 USB HID Protocol During a Write operation the host transmits the entire transaction sequence to the DLPC900 and the DLPC900 performs the operation associated with the Wr...

Page 15: ...ns 65 bytes which is correct The host hardware level HID driver extracts the Report ID before transmitting or receiving the data over the USB bus Header Bytes Report ID 0 0x00 0x17 0x4C Payload Bytes USB Command 0x12 0x20 0x12 0x83 Byte 0 Byte 1 Byte 2 Byte 3 Byte 4 Bytes 5 64 Multiple USB Transaction Transfers 0x00 Payload Bytes 0x45 0xAE 0xF7 0x3B 0x1D 0xC5 Bytes 66 83 Report ID 0 Byte 65 First ...

Page 16: ...s the number of data bytes in the sequence but excludes the number of bytes in steps 1 through 4 The length denotes the total number of bytes sent in step 5 command bytes 5 USB Command Two byte USB command 6 Once the host transmits the data over the USB interface the DLPC900 responds to the Read operation by placing the response data in its internal buffer The host must then perform a HID driver r...

Page 17: ...equence byte for the next command operation 4 Length Two bytes in length this denotes the number of data bytes in the sequence but excludes the number of bytes in steps 1 through 4 The length denotes the total number of bytes sent in steps 5 command bytes and 6 data bytes 5 USB Command Two byte USB command 6 Data The data appropriate to the command 1 3 INIT_DONE Signal The DLPC900 does not have a ...

Page 18: ...terface Protocol www ti com 18 DLPC900 Programmer s Guide DLPU018G OCTOBER 2014 REVISED APRIL 2022 Submit Document Feedback Copyright 2022 Texas Instruments Incorporated This page intentionally left blank ...

Page 19: ...erwise Note Momentary Image Corruption During Command Writes Certain commands may cause brief visual artifacts in the display image under some circumstances Command data values may always be read without impacting displayed image To avoid momentary image corruption due to a command disable the LEDs prior to the command write then re enable the LEDs after all commands have been issued Note Writing ...

Page 20: ... 1 0 No Secondary Controller Present d0 single controller DMD d1 dual controller DMD r 1 Secondary Controller Present and Ready 5 Reserved d0 r 6 Sequencer Abort Status Flag d0 r 0 No error has occurred 1 Sequencer has detected an error condition that caused an abort 7 Sequencer Error d0 r 0 No error has occurred 1 Sequencer detected an error 1 When the DLPC900 is combined with a single controller...

Page 21: ...and Definition BYTE BITS DESCRIPTION RESET TYPE 0 0 DMD Park Status d1 r 0 DMD micromirrors are not parked 1 DMD micromirrors are parked 1 Sequencer Run Flag d0 r 0 Sequencer is stopped 1 Sequencer is running normally 2 Video Frozen Flag d0 r 0 Video is running Normal frame change 1 Video is frozen Displaying single frame 3 External video source locked d0 r 0 External source not locked 1 External ...

Page 22: ...r configuration patch number 23 16 Sequencer configuration minor revision 31 24 Sequencer configuration major revision 2 1 5 Reading Hardware Configuration and Firmware Tag Information This command reads the hardware configuration of the system and also returns the 31 byte ASCII firmware tag information Table 2 9 Reading Hardware Configuration and Firmware Tag Information Command I2C USB Read 0x02...

Page 23: ...ay parameter is out of range 14 Pattern exposure time is out of range 15 Pattern number is out of range 16 Invalid pattern definition errors other than 9 15 17 Pattern image memory address is out of range 18 254 Not defined 255 Internal Error 2 1 7 Read Error Description This command retrieves the error descriptive string from the DLPC900 of the last executed command The string is composed of char...

Page 24: ...pplication and 1 megabyte of reserved space Pattern and sequence data starts at 0x9240000 Patterns may not span memory block boundaries Note Writing across memory block boundaries is not permitted Patterns must not span across block boundaries between blocks because of the extended addressing schema If a pattern does not fit in a given block the entire 24 bit image or composite image must be moved...

Page 25: ...Status Command I2C USB Read 0x0000 0x23 www ti com DLPC900 Control Commands DLPU018G OCTOBER 2014 REVISED APRIL 2022 Submit Document Feedback DLPC900 Programmer s Guide 25 Copyright 2022 Texas Instruments Incorporated ...

Page 26: ...on Dual DLPC900 board d0 single controller DMD d1 dual controller DMD 0 Secondary not in program mode 1 Secondary in program mode 7 Primary controller program mode d1 0 Primary not in program mode 1 Primary in program mode 1 3 0 Major Version x 7 4 Minor version x 2 7 0 Patch version x 3 7 0 Controller ID 0x52 4 7 0 Bootloader ID 0x65 Single DLPC900 0x90 Dual DLPC900 0x65 Single DLPC900 0x90 Dual ...

Page 27: ... loader 7 2 Reserved 2 2 3 Exit Program Mode This command tells the controller to exit its programming mode If the application receives the exit command the command has no effect Table 2 20 Exit Program Mode Command I2C USB Write 0x0030 0x30 Table 2 21 Exit Program Mode Command Definition BYTE BITS DESCRIPTION RESET TYPE 0 1 0 Program Mode d0 w 2 Exit Program Mode Reset controller and run applicat...

Page 28: ...ess where checksum operation begins 3 Specifies the sector address to be erased The address must be the start of a sector The Flash Data Size command always follows 1 and 2 above which defines how many bytes to be downloaded or how many bytes to include for the checksum operation Note The user must avoid erasing the first 128 kilobytes of the boot flash as this contains the boot image Please see T...

Page 29: ... tell the Boot Loader how many bytes to expect to program into the flash device Also used for specifying the checksum range when requesting that operation Table 2 27 Download Flash Data Size Command I2C USB Write 0x0033 0x33 Table 2 28 Download Data Size Command Definition BYTE BITS DESCRIPTION RESET TYPE 3 0 31 0 4 Byte flash size Valid Range 4 0x2FFFFFF Byte 0 is LSB byte 3 is MSB 0x0 w 2 2 8 Do...

Page 30: ...ntroller Enable Disable Command This command stops the given controller from executing any further commands until enabled by the same command This command is intended to be used when two DLPC900 controllers are combined with a dual controller DMD where one controller is the I2C Primary and the other is the I2C Secondary Table 2 32 Controller Enable Disable Command I2C USB Write 0x0031 0x31 Table 2...

Page 31: ... Power Mode The Power Control places the DLPC900 in a standby state and powers down the DMD interface Enter Standby mode prior to any planned system power shutdowns to safely park the micro mirrors Enable Standby mode only after all data for the last frame to be displayed has been transferred to the DLPC900 Standby mode must be disabled prior to sending any new data After executing this command th...

Page 32: ...cepted by the DLPC900 controller board is Return to Normal 0 Any other command can result in unexpected behavior Particularly a Park Unpark is not accepted until Normal mode is resumed 2 Perform a software reset If a software reset is performed in a batch file no further commands in the batch file are processed resulting in an idx batch file line index number error A USB or I2C connection must be ...

Page 33: ...patterns sequence Table 2 36 DMD Park and Unpark Command I2C USB Read Write 0x0609 0x14 0x94 Table 2 37 DMD Park and Unpark Command Definition BYTE BITS DESCRIPTION RESET TYPE 0 0 0 Unpark DMD Controller returns to the last commanded operating mode 1 Park DMD Mirrors go to parked state LED outputs are disabled d0 wr 7 1 Reserved d0 r 2 3 1 3 Curtain Color This register provides image curtain contr...

Page 34: ...th in pixels of the native DMD resolution Read from EDID r 3 2 32 0 Total DMD Area lines per frame Read from EDID r 5 4 32 0 Active Area pixels per line Note For dual DLPC900 DMDs this is half of the width of the native DMD resolution Read from EDID r 7 6 32 0 Active Area lines per frame Read from EDID r 9 8 32 0 Active Area first pixel Read from EDID r 11 10 32 0 Active Area first line Read from ...

Page 35: ...ifted and circularly rotated 3 ABC ACB Data sub channels B and C are swapped 4 ABC BAC Data sub channels A and B are swapped 5 ABC CBA Data sub channels A and C are swapped 6 and 7 Reserved d4 wr 7 4 Reserved d0 r 2 3 3 Input Source Commands The Input Source Selection determines the input source for the DLPC900 data display 2 3 3 1 Port and Clock Configuration This command selects which port the R...

Page 36: ... be displayed by the DLPC900 30 bit parallel port Internal Test Pattern or flash memory After executing this command the host may poll the system status using I2C commands 0x20 0x21 and 0x22 or the respective USB commands 0x1A0A 0x1A0B and 0x1A0C Table 2 46 Input Source Configuration Command I2C USB Read Write 0x1A00 0x00 0x80 Table 2 47 Input Source Configuration Command Definition BYTE BITS DESC...

Page 37: ...rn Select defines the test pattern displayed on the screen These test patterns are internally generated therefore all image processing is performed on the test images The resolution of the Test Pattern is native to the attached DMD Table 2 50 Internal Test Pattern Select Command I2C USB Read Write 0x1203 0x0A 0x8A Table 2 51 Internal Test Patterns Select Command Definition BYTE BITS DESCRIPTION RE...

Page 38: ... from 0 to 1023 x3FF wr 0x0 No Red Foreground color intensity 0x3FF Full Red Foreground color intensity 3 2 9 0 Green Foreground Color intensity in a scale from 0 to 1023 x3FF wr 0x0 No Green Foreground color intensity 0x3FF Full Green Foreground color intensity 5 4 9 0 Blue Foreground Color intensity in a scale from 0 to 1023 x3FF wr 0x0 No Blue Foreground color intensity 0x3FF Full Blue Foregrou...

Page 39: ... 0x7F USB 0x1A39 this must be called to update the image flip setting 2 3 4 1 Long Axis Image Flip Note The DLPC900 only supports long axis image flip for single controller DMDs This command is not supported when combined with a dual controller DMD The Long Axis Image Flip defines whether the input image is flipped across the long axis of the DMD If this parameter is changed while displaying a sti...

Page 40: ...2C USB Read Write 0x1009 0x09 0x89 Table 2 59 Short Axis Image Flip Command Definition BYTE BITS DESCRIPTION RESET TYPE 0 0 Flips image along the short side of the DMD d0 wr 0 Disable flip 1 Enable flip 7 1 Reserved d0 r Flip Disabled Flip Enabled DMD Figure 2 2 Image Short Axis Flip Example 2 3 5 IT6535 Power Mode The IT6535 Power Mode command allows the user to power down and tri state the IT653...

Page 41: ...amma Configuration and Enable Command I2C USB Read Write 0x1A3B N A 0x61 Table 2 63 Gamma Configuration and Enable Command Definition BYTE BITS DESCRIPTION RESET TYPE 0 0 Disables or enables gamma table d0 w 0 Disable gamma 1 Enable gamma 7 1 Reserved d0 w 1 1 0 Stored Gama Tables 0 4 see Figure 2 3 d0 w 0 Linear ɣ 1 0 1 Power Law 2 22 ɣ 2 22 2 Photo 3 Enhanced 4 Max Brightness 5 7 Reserved 7 2 Re...

Page 42: ...Figure 2 3 Gamma Chart DLPC900 Control Commands www ti com 42 DLPC900 Programmer s Guide DLPU018G OCTOBER 2014 REVISED APRIL 2022 Submit Document Feedback Copyright 2022 Texas Instruments Incorporated ...

Page 43: ...display mode and so forth Therefore the recommended and absolute maximum settings vary greatly 2 3 7 1 LED Enable Outputs The DLPC900 offers three sets of pins to control the LED enables RED_LED_EN for the red LED GRN_LED_EN for the green LED BLU_LED_EN for the blue LED After reset all LED enables are placed in the inactive state until the board initializes Table 2 64 LED Enable Outputs Command I2...

Page 44: ...ty of PWM signals 1 d0 wr 0 Normal polarity PWM 0 value corresponds to no current while PWM 255 value corresponds to maximum current 1 Inverted polarity PWM 0 value corresponds to maximum current while PWM 255 value corresponds to no current 7 2 Reserved d0 r 1 Depending on the LED driver design the polarity chosen may have an opposite effect DLPC900 Control Commands www ti com 44 DLPC900 Programm...

Page 45: ...rity of PWM signals is 0x00 0 duty cycle Red LED driver generates no current to 0xFF 100 duty cycle Red LED driver generates maximum current The current level corresponding to the selected PWM duty cycle is a function of the specific LED driver design and thus varies by design 1 7 0 Green LED PWM current control x78 wr Valid range assuming normal polarity of PWM signals is 0x00 0 duty cycle Green ...

Page 46: ...inimum LED Pulse Width in ns Command I2C USB Read Write 0x1A43 N A 0x67 Table 2 73 Set Minimum LED Pulse Width in ns Command Definition Table BYTE BITS DESCRIPTION RESET TYPE 0 7 0 Minimum pulse width in nanoseconds d0 wr 2 3 7 5 Get Minimum LED Pattern Exposure in microseconds µs This parameter gets the stored minimum LED pattern exposure in microseconds Table 2 74 Get Minimum LED Pattern Exposur...

Page 47: ...15 7 0 16 bytes are returned Each two bytes represent the Minimum Pattern Exposure for each bit depth from 0 to 8 in microseconds d0 r www ti com DLPC900 Control Commands DLPU018G OCTOBER 2014 REVISED APRIL 2022 Submit Document Feedback DLPC900 Programmer s Guide 47 Copyright 2022 Texas Instruments Incorporated ...

Page 48: ...N RESET TYPE 0 7 0 GPIO selection See Table 2 80 for description of available pins d0 wr 1 0 Output state d0 wr 0 Low 1 High 1 0 Configure pin as input d0 wr 1 Configure pin as output 2 0 Configure as normal mode d0 wr 1 Configure as open drain mode 7 3 Reserved d0 r Table 2 80 GPIO Selection GPIO Selection DLPC900 GPIO Pin Function Alternate Function 0 GPIO_PWM_00 GPIO PWM Output 1 GPIO_PWM_01 GP...

Page 49: ... 0x2 2 0x7F 127 0xFF 0x80 Reserved 2 3 8 3 GPIO Busy Added in FW 6 x the GPIO Busy command queries the system to poll if the GPIO subsystem is busy Table 2 83 GPIO Busy Command I2C USB Read Write 0x1A5E 0x5E N A Table 2 84 GPIO Configuration Command Definition BYTE BITS DESCRIPTION RESET TYPE 0 0 0 not busy d0 r 1 busy 7 1 Reserved d0 r 2 3 9 Pulse Width Modulated PWM Control DLPC900 provides four...

Page 50: ...0 r 4 1 31 0 Clock Period in increments of 53 57 ns Clock Period value 1 53 5 ns d0 wr 5 6 0 Duty Cycle value 1 Value range is 1 to 99 d0 wr 7 Reserved d0 r 2 3 9 2 PWM Enable After the PWM Setup command configures the clock period and duty cycle the PWM Enable command activates the PWM signals Table 2 87 PWM Enable Command I2C USB Read Write 0x1A10 0x40 0xC0 Table 2 88 PWM Enable Command Definiti...

Page 51: ... File Name Command Definition BYTES BITS DESCRIPTION RESET TYPE 0 7 0 Batch Command Index Read parameter d0 w 15 1 All Batch Command Name String Read result d0 r 2 3 10 2 Batch File Execute This command executes all the commands in a given batch file at the given index Table 2 91 Batch File Execute Command I2C USB Write 0x1A15 0xBB Table 2 92 Batch File Execute Command Definition BYTES BITS DESCRI...

Page 52: ...ler EVM User s Guide on how to add batch files to the firmware VIDEO_CONT_SEL 0x01 DELAY 0xC8 CHANNEL_SWAP 0x04 FLIP_LONG 0x01 2 4 Display Mode Commands The DLPC900 display consists of several parameters which dictate the loading of the DMD and the control of PWM to the LEDs The DLPC900 supports four main display modes Video Mode Video Pattern Mode Pre Stored Pattern Mode Pattern On The Fly Mode T...

Page 53: ...the capability to display a set of patterns and signal a camera to capture when these patterns are displayed Figure 2 4 shows the DLPC900 Single Controller DMD block diagram and Figure 2 5 shows the DLPC900 Dual Controller DMD block diagram The main functional blocks for the four display modes are shown in these diagrams Note For TI components in these diagrams please refer to the latest DLPLCRC90...

Page 54: ...IO PWM POSENSE SCL1 SDA1 RGB SYNCS PCLK BOOTHOLDZ SCL2 SDA2 SCL0 SDA0 CSZ_ 2 0 GPIO 60 46 45 12 V DATA 15 0 Connectors Connectors Solid state memory Solid state memory Other Other TI DLP chipset TI DLP chipset TI Component TI Component Solid state memory Other TI DLP chipset TI Component Connectors Solid state memory Other TI DLP chipset TI Component Figure 2 4 DLPC900 Single Controller System Blo...

Page 55: ... HEARTBEAT DMD Connector Cable UART Secondary Reset S_RESET SYNC SSP I 2 C GPIO FPGA JTAG 2 5 V LDO 3 V VCCIO 12 V MOSC_P Flash CSZ_ 2 0 GPIO 60 46 45 DATA 15 0 Flash CSZ_ 2 0 GPIO 60 46 45 DATA 15 0 BOOTHOLDZ Connectors Connectors Solid state memory Solid state memory Other Other TI DLP chipset TI DLP chipset TI Component TI Component Solid state memory Other TI DLP chipset TI Component Connector...

Page 56: ... bit extracted from all the pixels in the full color 2D image Figure 2 6 Bit Planes of a 24 Bit RGB Image The length of each bit plane in the time slot is weighted by the corresponding power of two of its binary representation resulting in a binary pulse width modulation of the image For example a 24 bit RGB input has three colors with 8 bit depth each Each color time slot is divided into eight bi...

Page 57: ...se time slots to indicate when the image is displayed For structured light applications this mechanism provides the capability to display a set of patterns and signal a camera to capture these patterns overlaid on an object 2 4 1 Display Mode Selection The Display Mode Selection command switches the internal image processing functions of the DLPC900 to operate in the mode selected After executing ...

Page 58: ...splayed image d0 11 10 15 0 Output image first active line row of displayed image d0 13 12 15 0 Output image horizontal resolution pixels columns per line row d 1 15 14 15 0 Output image vertical resolution lines rows per frame d 2 1 Maximum horizontal resolution depends on attached DMD 2 Maximum vertical resolution depends on attached DMD 2 4 1 3 DMD Block Load The DMD Block Load command allows t...

Page 59: ...45 42 27 30 3 45 42 27 30 4 45 42 33 30 5 48 45 38 34 6 54 51 38 38 7 60 56 49 42 8 66 61 55 46 9 72 67 61 50 10 78 72 66 54 11 84 77 72 58 12 90 83 77 62 13 96 88 83 14 101 93 89 15 105 99 94 16 105 100 1 See DMD data sheet for number of blocks and rows per block 2 4 1 4 Minimum Exposure Times Table 2 103 Minimum Exposure in Any Pattern Mode 1 BIT DEPTH Minimum Exposure in Any Pattern Mode µs DLP...

Page 60: ...he system is idle between exposures if the application allows for it or when the exposure pattern sequence is stopped To enable this mode the pattern sequences must first be stopped To restart the pattern sequence this mode must be disabled This mode can be enabled in any operating mode except for Video Mode This mode can also be enabled to optimize the mirrors that experience prolonged use of bei...

Page 61: ...ry The DLPC900 can also perform no decompression if the images are not compressed For most efficient storage and compression of images pack stored images into groups of 24 bit RGB bitmap images Note Compressed images must be stored right side up instead of upside down as in standard BMP format images Note With RLE there is always a question of whether the compressed image is larger or smaller than...

Page 62: ...Image Padding 2 4 3 2 Enhanced Run Length Encoding To achieve higher compression ratios this compression format takes advantage of the similarities from line to line and uses one or two bytes to encode the length Table 2 109 defines the RLE Control Bytes recognized by the DLPC900 The DLPC900 firmware automatically decompresses the image when operating in Pre Stored Pattern Mode or Pattern On The F...

Page 63: ... Pattern Display Commands Pattern On The Fly Commands Note If the pattern display is already active it must be stopped using I2C command 0x65 or USB 0x1A24 before calling these commands 2 4 4 1 Trigger Commands To synchronize a camera with the displayed patterns the DLPC900 supports three pattern modes Video Pattern Mode applicable when pattern data from RGB parallel port VSYNC used as trigger inp...

Page 64: ...s example uses internal triggering so TRIG_IN_x signals are not used Figure 2 8 Video Pattern Mode Timing Diagram Example Figure 2 9 shows an example in pre stored pattern mode Pattern sequences of four are displayed TRIG_OUT_1 frames each pattern exposed while TRIG_OUT_2 is user programmable and in this example indicates the start of each pattern in the sequence If the pattern sequence is configu...

Page 65: ...he number of active DMD blocks 2 4 4 1 2 Trigger Out 2 The Trigger Out 2 Control command sets the polarity and rising edge delay of the TRIG_OUT_2 signal The delay is compared to when the pattern is displayed on the DMD Before executing this command stop the current pattern sequence Table 2 113 Trigger Out 2 Command I2C USB Read Write 0x1A1E 0x6B 0xEB Table 2 114 Trigger Out 2 Command Definition B...

Page 66: ... the pattern sequence If the pattern sequence is active the falling edge on the TRIG_IN_2 signal input stops the pattern sequence Before executing this command stop the current pattern sequence Table 2 117 Trigger In 2 Command I2C USB Read Write 0x1A36 0x7A 0xFA Table 2 118 Trigger In 2 Command Definition BYTE BITS DESCRIPTION RESET TYPE 0 0 0 Pattern started on rising edge stopped on falling edge...

Page 67: ... edge delay of the Green LED enable signal Table 2 122 Green LED Enable Delay Command I2C USB Read Write 0x1A20 0x6D 0xED Table 2 123 Green LED Enable Command Definition prior to FW 6 x BYTE BITS DESCRIPTION 1 RESET TYPE 1 0 15 0 LED Enable Raising Edge delay in micro seconds int16 number Valid Range 20 to 20000 d0 wr 3 2 15 0 LED Enable Falling Edge delay in micro seconds int16 number Valid Range...

Page 68: ...inimum delay is min_exposure 5 µs See Table 2 102 for the min_exposure for the number of active DMD blocks Note The new Blue LED Enable Delay Command Definition is NOT backward compatible with FW prior to 6 x 2 4 4 3 Pattern Display Commands 2 4 4 3 1 Pattern Display Start Stop The Pattern Display Start Stop command starts or stops the programmed pattern sequence After executing this command the h...

Page 69: ... a Pattern Display Stop command when changing the pattern sequence various settings or executing batch command sequences www ti com DLPC900 Control Commands DLPU018G OCTOBER 2014 REVISED APRIL 2022 Submit Document Feedback DLPC900 Programmer s Guide 69 Copyright 2022 Texas Instruments Incorporated ...

Page 70: ...e Issue this command after any Pattern Display LUT Definition command is issued NOTES This command makes all Pattern Display LUT Definition data effective and sets the Pattern Display LUT default order which displays all patterns in the DLPC900 pattern memory in the order they are defined by the pattern index in Pattern Display LUT Definition When this command is executed any pattern that precedes...

Page 71: ...rn index numbers used must be in the set of patterns defined by the Pattern Display LUT Configuration command i e Must less than or equal to the number of entries 1 defined by the Pattern Display LUT Configuration command Table 2 134 Pattern Display LUT Reorder Configuration Command I2C USB Read Write 0x1A32 0xF6 Table 2 135 Pattern Display LUT Reorder Configuration Command Definition BYTE BITS DE...

Page 72: ...in the default Display Pattern LUT order These two patterns become a versatile trigger set that can be used repeatedly wherever a trigger is desired Since the triggered pattern is black even if your exposure integration begins with the triggered black pattern there is no additional light contributing to your exposure 2 4 4 3 5 Pattern Display LUT Definition The Pattern Display LUT Definition conta...

Page 73: ...3 1 Extended Bit Depth 8 1 Note This parameter is ignored in firmware versions prior to 6 0 w 7 2 Reserved w 11 10 10 0 Image pattern index Not applicable in video pattern mode Valid Range 0 255 w 15 11 Bit position in the image pattern Frame in video pattern mode Valid range 0 23 w 1 The Extended Bit Depth bit was added to a previously reserved part of the LUT definition for backward compatibilit...

Page 74: ...d multiple times until all the bytes are sent Compress images using Run Length Encoding RLE See Section 2 4 3 for a description of the compression formats The first line of this command must contain the 48 bytes of the Image Header and the remaining 456 bytes contain the first 456 bytes of the image data See Section 2 4 2 When the DLPC900 is combined with a dual controller DMD the user must load t...

Page 75: ...d BYTES BITS DESCRIPTION RESET TYPE n 2 All Compressed BMP Data d0 w www ti com DLPC900 Control Commands DLPU018G OCTOBER 2014 REVISED APRIL 2022 Submit Document Feedback DLPC900 Programmer s Guide 75 Copyright 2022 Texas Instruments Incorporated ...

Page 76: ...ered due to the dividers used in calculating the rate d0 w 2 4 4 5 2 I2C Pass Through Write The I2C Pass Through Write command allows the user to send data to the specified I2C device on the port that was configured by the Pass Through Configuration command Table 2 144 I2C Pass Through Write Command I2C USB Read Write 0x1A4F N A 0xCF Table 2 145 I2C Pass Through Write Command Definition BYTE BITS ...

Page 77: ...E 1 0 15 0 Number of bytes to write 1 512 d0 w 3 2 15 0 Number of bytes to read 1 512 d0 w 4 1 0 I2C Port number 1 or 2 Port configuration of the port being used must have been done prior to using this command d0 w 0 Invalid Port 1 Port 1 2 Port 2 3 Invalid Port 7 2 Reserved 6 5 10 0 Secondary Address d0 w 15 11 Reserved n 7 All Data to be written d0 w m 0 All Data bytes read d0 r www ti com DLPC9...

Page 78: ...00 Control Commands www ti com 78 DLPC900 Programmer s Guide DLPU018G OCTOBER 2014 REVISED APRIL 2022 Submit Document Feedback Copyright 2022 Texas Instruments Incorporated This page intentionally left blank ...

Page 79: ...the fault status sequence In Table 3 1 the fault status can be interpreted by finding the status matching the number of critical error pulses followed by the number of module error pulses Figure 3 1 DLPC900 FAULT_STATUS Format Table 3 1 DLPC900 Fault Status Description Number of Critical Error Pulses Number of Module Error Pulses Description 1 Main 1 Missing flash table signature 2 System 2 Mismat...

Page 80: ...C900 Fault Status www ti com 80 DLPC900 Programmer s Guide DLPU018G OCTOBER 2014 REVISED APRIL 2022 Submit Document Feedback Copyright 2022 Texas Instruments Incorporated This page intentionally left blank ...

Page 81: ...on release of system reset the DLPC900 executes an auto initialization routine that is automatically uploaded from flash This initialization process consists of setting specific configurations uploading specific configuration tables such as sequence and displaying a defined splash screen The goal of the auto initialization process is to allow the DLPC900 to fully configure itself for default opera...

Page 82: ...n and Initialization Considerations www ti com 82 DLPC900 Programmer s Guide DLPU018G OCTOBER 2014 REVISED APRIL 2022 Submit Document Feedback Copyright 2022 Texas Instruments Incorporated This page intentionally left blank ...

Page 83: ...rn Mode Example STEP I2C 1 USB 1 DATA 1 DESCRIPTION 1 E9 1A1B 02 Set video pattern mode 2 F8 1A34 00 00 C8 00 00 90 00 00 00 00 00 00 Define pattern 0 200 µs red 1 bit and wait for trigger 3 F8 1A34 01 00 90 01 00 21 00 00 00 00 00 08 Define pattern 1 400 µs green 2 bit 4 F5 1A31 02 00 00 00 00 00 Number of patterns 2 with indefinite repeat 5 E5 1A24 02 Start running the pattern 2 1 All bytes are ...

Page 84: ...A24 02 Start running the pattern 2 1 All bytes are in HEX notation 2 There must be at least two pattern images in flash memory Command Examples www ti com 84 DLPC900 Programmer s Guide DLPU018G OCTOBER 2014 REVISED APRIL 2022 Submit Document Feedback Copyright 2022 Texas Instruments Incorporated ...

Page 85: ...e Example The following table lists the steps to communicate with an external device using one of the DLPC900 I2C ports The example shows how to write 16 bytes to an EEPROM starting at address location 16 Table 5 4 I2C Pass Through Write Example STEP I2C 1 USB 1 DATA 1 DESCRIPTION 1 C5 1A4E 01 A0 86 01 00 Address mode 7 bits port 1 and clock 100 kHz 2 CF 1A4F 11 00 01 A0 00 00 10 01 18 01 03 A5 00...

Page 86: ...ommand Examples www ti com 86 DLPC900 Programmer s Guide DLPU018G OCTOBER 2014 REVISED APRIL 2022 Submit Document Feedback Copyright 2022 Texas Instruments Incorporated This page intentionally left blank ...

Page 87: ...led 0x10 0x90 0x1A07 LED Enable WR 0x8 LEDs controlled by Sequencer 0x11 0x0205 Get Version R Matches firmware version stored in Flash Matches firmware version 0x12 0x0206 Get firmware type R Matches firmware type stored in Flash Matches firmware type of attached DMD 0x14 0x94 0x0609 DMD Park Unpark WR 0x0 Unpark DMD 0x1A 0x9A 0x1204 Test Pattern Color WR 0x3FF 0x3FF 0x3FF 0x0 0x0 0x0 White foregr...

Page 88: ...n stopped 0x67 0x1A43 Set Minimum LED Pulse Width in ns W 0x0 0x0 0x69 0xE9 0x1A1B Display Mode WR 0x0 Video Mode 0x6A 0xEA 0x1A1D Trigger Out 1 WR 0x0 0x0 0x0 0x0 0x0 Normal Polarity with no rising or falling delay 0x6B 0xEB 0x1A1E Trigger Out 2 WR 0x0 0x0 0x0 0x0 0x0 Normal Polarity with no rising delay 0x6C 0xEC 0x1A1F Red Enable Delay WR 0x0 0x0 0x0 0x0 No rising or falling delay 0x6D 0xED 0x1...

Page 89: ...0201 x x x x LED Enable 0x10 0x90 0x1A07 x x x x x Get Version 0x11 0x0205 x x x x x Test Pattern Color 0x1A 0x9A 0x1204 x DMD Park Unpark 0x14 0x94 0x0609 x x x 1 x 1 x 1 Hardware Status 0x20 0x1A0A x x x x x System Status 0x21 0x1A0B x x x x x Main Status 0x22 0x1A0C x x x x x Read Error Code 0x32 0x0100 x x x x x Read Error Code Description 0x33 0x0101 x x x x x Initialize Pattern BMP Load 0xAA...

Page 90: ...x1A20 x x x x Blue Enable Delay 0x6E 0xEE 0x1A21 x x x x Invert Data 0x74 0xF4 0x1A30 x x x x Pattern LUT Configuration 0x75 0xF5 0x1A31 x x x x Pattern LUT Reorder Configuration 0xF6 0x1A34 x x x Pattern LUT Definition 0xF8 0x1A34 x x x x Trigger In 1 0x79 0xF9 0x1A35 x x x x Trigger In 2 0x7A 0xFA 0x1A36 x x x x Gamma Configuration and Enable 0x61 0x1A3B x x x x x Manual Input Display Resolution...

Page 91: ...RRENT LED Current Section 2 3 7 2 DISP_CONFIG Display Configuration Section 2 4 1 2 DISP_MODE Display Mode Section 2 4 1 TRIG_OUT1_CTL Trigger 1 Output Control Section 2 4 4 1 1 TRIG_OUT2_CTL Trigger 2 Output Control Section 2 4 4 1 2 RED_LED_ENABLE_DLY Red LED Enable Delay Section 2 4 4 2 1 GREEN_LED_ENABLE_DLY Green LED Enable Delay Section 2 4 4 2 2 BLUE_LED_ENABLE_DLY Blue LED Enable Delay Sec...

Page 92: ...tch File Delay Section 2 3 10 3 I2C_CONFIG I2C Pass Through Configuration Section 2 4 4 5 1 CURTAIN_COLOR Curtain Color Section 2 3 1 3 BATCHFILE_EXECUTE Batch File Execute Section 2 3 10 2 DMD_BLOCKS DMD Block Load Section 2 4 1 3 DMD_IDLE DMD Idle Mode 50 50 Duty Cycle Section 2 4 1 5 1 Commands in batch files that previously contained Command Descriptors using legacy terminology will continue t...

Page 93: ...ry and removed image 24 Corrected boot flash size to 128 MB in Section 2 2 5 28 Added two minute wait time for 50 50 display time 31 Added Requirements for Park command and to resume operation in any Pattern mode 33 Added Gamma Configuration and Enable Command 41 Added Minimum LED Pulse Width command in ns to support 16 bit patterns Table 2 72 46 Added Get Minimum LED Pattern Exposure in nanosecon...

Page 94: ...igger Considerations to the Pattern Display LUT Reorder Configuration command 71 Changed From requiring a Pattern Display LUT Configuration command before to after using Pattern Display LUT Definition commands 72 Added notes to the Pattern Display LUT Definition command 72 Changed requirements for Pattern On The Fly Mode to issue a Pattern LUT Configuration after any Patter LUT Definition 73 Remov...

Page 95: ... 2 0 and later 28 Corrected blue curtain color intensity reset value 33 Removed Allowed Pattern Display Combinations table 52 Added clarification on how and when block load is used 58 Corrected minimum exposure values for number of active DMD blocks 58 Added table with minimum exposure based on bit depth 59 Added DMD Idle Mode command 60 Corrected video pattern mode trigger description and timing ...

Page 96: ...evision History www ti com 96 DLPC900 Programmer s Guide DLPU018G OCTOBER 2014 REVISED APRIL 2022 Submit Document Feedback Copyright 2022 Texas Instruments Incorporated This page intentionally left blank ...

Page 97: ...o change without notice TI grants you permission to use these resources only for development of an application that uses the TI products described in the resource Other reproduction and display of these resources is prohibited No license is granted to any other TI intellectual property right or to any third party intellectual property right TI disclaims responsibility for and you will fully indemn...

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