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EVM Operation
Table 2. Factory Default Jumper Settings (continued)
Jumper
Reference
Function
Position
W5
1-2
Negative supply rail of the output op-amp, U2, is powered by V
SS
for bipolar operation.
W6
2-3
FS signal from J2-7 is routed to drive the CS signal of the DAC8881.
W7
OPEN
Leave this jumper open since R1 is installed. This is the default mode of the EVM from the factory.
W8
1-2
Routes the on-board +5V voltage reference, V
REF
H for the DAC.
W9
1-2
Routes V
OUT
and R
FB
from J4-2 and J4-4 (if they are shunted) to the non-inverting input of U2
op-amp.
W10
OPEN
LDAC signal of the DAC8881 is tied to ground for synchronous update of the DAC8881 output.
W11
1-2
Routes V
CC
to power the analog supply of the U3 reference device.
W12
OPEN
Disconnects the inverting input of U2 from R12 gain resistor for other output mode of configuration.
J1
1-2
LDAC signal of the DAC8881 is tied to ground for synchronous DAC update operation.
J2
1-2
The V
OUT
pin of the DAC8881 is connected to the noninverting input of the op-amp, U2.
J3
5-6
IOV
DD
of the DAC8881 is powered with +3.3VD.
J4
1-2
The V
OUT
pin of the DAC8881 is connected to the noninverting input of the op-amp, U2.
Figure 10. DAC8881 EVM Default Jumper Configuration
3.2
Host Processor Interface
The host processor basically drives the DAC, so the DACs proper operation depends on the successful
configuration between the host processor and the EVM board. In addition, properly written code is also
required to operate the DAC.
A custom cable can be made specifically for the user selected host interface platform. The EVM interfaces
to the host processor through the J2 header connector for the serial control signals and the serial data
input.
An interface adapter card is also available for a specific TI DSP starter kit as well as other interface
platforms designed by the Precision Analog Applications group of Texas Instruments, as mentioned in
chapter 1 of this manual. Using the interface card alleviates the tedious task of building a customized
cable and allows easy configuration of a simple evaluation system.
The DAC8881 interfaces with any host processor capable of handling SPI protocols or a popular TI DSP.
For more information regarding the DAC8881 data interface, refer to the data sheet (
11
SLAU257A – September 2008 – Revised November 2009
DAC8881 Evaluation Module
Copyright © 2008–2009, Texas Instruments Incorporated