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1

Overview

1.1

Features

1.2

Power Requirements

Overview

This section gives a general overview of the DAC8554EVM and describes some of the factors that must
be considered when using this demonstration board.

The DAC8554EVM is a simple evaluation module designed for a quick and easy way to evaluate the
functionality and performance of the high-resolution, quad-channel, serial input DAC8554 digital-to-analog
converter (DAC). This EVM features a serial interface to communicate with any host microprocessor or TI
DSP-based system.

This subsection describes the power requirements for this device.

1.2.1

Supply Voltage

The DC power supply requirement for the digital section (V

DD

) of this EVM is typ5V connected to

the J5-1 terminal or via the J3-10 terminal (when plugged in with another EVM board or interface card)
and is referenced to ground through the J5-2 and J3-5 terminals. The DC power supply requirements for
the analog section of this EVM are: V

CC

and V

SS

range from +15.75V to –15.75V (maximum), connecting

through J1-3 and J1-1 respectively, or through terminals J3-1 and J3-2. The +5V

A

connects through

terminals J5-3 or J3-3, and the +3.3V

A

connects through terminal J3-8. All of the analog power supplies

are referenced to analog ground through terminals J1-2 and J3-6.

The analog power supply for the device under test, U1, can be powered by 5V

A

or +3.3V

A

by

selecting the proper position of jumper JMP7. This configuration allows the DAC8554 analog section to
operate from either supply power while the I/O and digital section are powered by +5V, V

DD

.

The V

CC

supply source is primarily used to provide the positive rail of the external output op amp, U2, the

reference chip, U3 and the reference buffer, U4. The negative rail of the output op amp, U2, can be
selected between V

SS

and AGND via jumper JMP10. The external op amp is installed as an option to

provide output signal conditioning or to boost capacitive load drive, or for other desired output mode
requirements.

CAUTION

To avoid potential damage to the EVM board, be sure that the correct
cables are connected to their respective terminals as labeled on the EVM
board. Stresses above the maximum listed voltage ratings may cause
permanent damage to the device.

1.2.2

Reference Voltage

The +5V precision voltage reference is provided to supply the external voltage reference for the DAC
through the REF02 (U3) via jumper JMP8, by shorting pins 1 and 2. The reference voltage goes through
an adjustable 100k

potentiometer, R15, in series with 20k

, R16, to allow the user to adjust the

reference voltage to its desired settings. The voltage reference is then buffered through U4A as seen by
the device under test. The test points TP2, TP3 and TP4 are also provided, as well as J4-18 and J4-20, in
order to allow the user to connect another external reference source if the onboard reference circuit is not
desired. The external voltage reference should not 5V DC.

The REF02 precision reference is powered by V

CC

(+15V) through either terminal J1-3 or J3-1.

CAUTION

When applying an external voltage reference through TP2 or J4-20, make
sure that it does not 5V maximum. External voltage references in
excess of +5V can permanently damage the DAC8554 being tested (U1).

2

DAC8554EVM User's Guide

SBAU121 – January 2006

Summary of Contents for DAC8554EVM

Page 1: ...sign and Performance 4 3 EVM Operation 14 4 Schematic 20 List of Figures 1 DAC8554EVM Functional Block Diagram 3 2 DAC8554EVM PCB Top Silkscreen Image 5 3 DAC8554EVM PCB Layer 1 Top Signal Layer 5 4 D...

Page 2: ...l section are powered by 5V VDD The VCC supply source is primarily used to provide the positive rail of the external output op amp U2 the reference chip U3 and the reference buffer U4 The negative rai...

Page 3: ...the trouble involved with building a custom cable Additionally there is also an MSP430 based platform HPA449 that uses the MSP430F449 microprocessor to which this EVM can connect and interface as wel...

Page 4: ...ement and proper signal routing Place the bypass capacitors as close as possible to the device pins and properly separate the analog and digital signals from each other In the layout process carefully...

Page 5: ...www ti com PCB Design and Performance Figure 2 DAC8554EVM PCB Top Silkscreen Image Figure 3 DAC8554EVM PCB Layer 1 Top Signal Layer SBAU121 January 2006 DAC8554EVM User s Guide 5...

Page 6: ...www ti com PCB Design and Performance Figure 4 DAC8554EVM PCB Layer 2 Ground Plane Figure 5 DAC8554EVM PCB Layer 3 Power Plane DAC8554EVM User s Guide 6 SBAU121 January 2006...

Page 7: ...www ti com PCB Design and Performance Figure 6 DAC8554EVM PCB Layer 4 Bottom Signal Layer Figure 7 DAC8554EVM PCB Bottom Silkscreen Image SBAU121 January 2006 DAC8554EVM User s Guide 7...

Page 8: ...1 Minimum copper conductor width is 7 mils Minimum conductor spacing is 7 mils 12 Number of finished layers 4 13 Board dimensions 3 250 in x 1 7 in 50 15mil 0 381 mm PTH 43 23 622mil 0 6mm PTH 42 39 3...

Page 9: ...www ti com PCB Design and Performance Figure 9 INL and DNL Characterization Graph of DAC A SBAU121 January 2006 DAC8554EVM User s Guide 9...

Page 10: ...www ti com PCB Design and Performance Figure 10 INL and DNL Characterization Graph of DAC B DAC8554EVM User s Guide 10 SBAU121 January 2006...

Page 11: ...www ti com PCB Design and Performance Figure 11 INL and DNL Characterization Graph of DAC C SBAU121 January 2006 DAC8554EVM User s Guide 11...

Page 12: ...www ti com PCB Design and Performance Figure 12 INL and DNL Characterization Graph of DAC D 12 DAC8554EVM User s Guide SBAU121 January 2006...

Page 13: ...05 X7R 10 3 C1 C2 C3 TDK C3216X7R1C106M Multilayer Ceramic Capacitor 10 F 1206 X7R Not 2 C8 C9 TDK Multilayer Ceramic Capacitor 1206 Installed 16 bit Quad Voltage Output Serial Input DAC 11 1 U1 Texas...

Page 14: ...4 1 is connected to the noninverting input of the output op amp U2 JMP16 1 2 J4 5 is connected to the output of the op amp U2 The host processor drives the DAC Thus proper DAC operation depends on a s...

Page 15: ...channels when stacking two EVMs together The DAC8554EVM includes an optional signal conditioning circuit for the DAC output through an external operational amplifier U2 The output op amp is set to uni...

Page 16: ...pen resistor R9 3 4 2 Output Gain of 2 There are two types of configurations that will yield an output gain of 2 depending on the setup of jumpers JMP5 and JMP6 These configurations allow the user to...

Page 17: ...U4 is used for reference buffering U4A while the other half is unused This unused op amp U4B is left for whatever op amp circuit application the user desires to implement The 1206 footprint for the re...

Page 18: ...9 for output gain of 2 5V analog supply is selected for AVDD JMP7 3 3V analog supply is selected for AVDD Routes the adjustable buffered onboard 5V reference to the VREFH input of the DAC8554 JMP8 Rou...

Page 19: ...Function Routes VOUTB to J4 4 JMP12 Routes VOUTB to J4 12 Routes VOUTC to J4 6 JMP13 Routes VOUTC to J4 14 Routes VOUTD to J4 8 JMP14 Routes VOUTD to J4 16 Routes J4 1 to U2 noninverting input JMP15 R...

Page 20: ...www ti com 4 Schematic Schematic DAC8554EVM User s Guide 20 SBAU121 January 2006...

Page 21: ...DVDD 12 LDAC 16 A1 14 GND 6 VrefH 3 VrefL 5 VoutA 1 ENABLE 15 A0 13 VoutD 8 Din 11 SCLK 10 SYNC 9 AVDD 4 VoutC 7 U1 DAC8554IPW A0 2 A1 4 A2 6 A3 8 A4 10 A5 12 A6 14 A7 16 REF 18 REF 20 A0 1 A1 3 A2 5...

Page 22: ...proceeding User assumes all responsibility and liability for proper and safe handling and use of the EVM and the evaluation of the EVM TI shall have no liability for any costs losses or damages result...

Page 23: ...ute a license from TI to use such products or services or a warranty or endorsement thereof Use of such information may require a license from a third party under the patents or other intellectual pro...

Page 24: ...Mouser Electronics Authorized Distributor Click to View Pricing Inventory Delivery Lifecycle Information Texas Instruments DAC8554EVM...

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