DAC80502
(U1)
U
SB
2
AN
Y
In
te
rf
a
ce
(
J1
)
Po
w
e
r
In
p
u
t
(J2
,
JP
1
)
Onboard Reference
(U2)
Jumper Settings
(JP1 to JP5)
Output Interface
(J3, J4)
Detailed Description
6
SLAU818 – November 2019
Copyright © 2019, Texas Instruments Incorporated
DAC80502 Evaluation Module
3
Detailed Description
3.1
Hardware Description
The following sections provide detailed information on the EVM hardware and jumper configuration
settings.
3.1.1
Theory of Operation for the DAC80502EVM Hardware
The block diagram of the DAC80502EVM board is displayed in
. The EVM board connects to
external power supply VDD either through USB2ANY (3.3 V) or through JP2. The headroom for the
reference must be maintained as specified in the
. The 10-pin wire-to-board
connector, J1, provides an interface to the USB2ANY platform. The SPI signals are provided either by
using the USB2ANY header or the test points. Use JP4 to select the onboard 5-V reference source. JP4 is
open by default, making the DAC work with the internal reference.
Figure 4. DAC80502EVM Hardware Block Diagram