Texas Instruments DAC5674 EVM User Manual Download Page 5

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Contents

Contents

Overview

1-1

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1.1

Purpose

1-2

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1.2

EVM Basic Functions

1-2

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1.3

Power Requirements

1-2

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1.4

DAC5674 EVM Operational Procedure

1-3

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PCB Layout and Parts List

2-1

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2.1

PCB Layout

2-2

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2.2

Parts List

2-5

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Circuit Description

3-1

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3.1

Circuit Function

3-2

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3.1.1

Input Clock

3-2

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3.1.2

Input Data

3-2

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3.1.3

Output Data

3-3

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3.1.4

Internal Reference Operation

3-4

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3.1.5

External Reference Operation

3-4

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3.1.6

Sleep Mode

3-4

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3.1.7

Filter Control

3-4

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3.1.8

PLL Divider Control

3-4

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Schematics

4-1

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Tables

2−1

DAC5674 EVM Parts List

2-5

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3−1

EVM Clock Configuration

3-2

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3−2

Input Connector J8

3-3

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3−3

Transformer Output Configuration

3-3

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Summary of Contents for DAC5674 EVM

Page 1: ...DAC5674 EVM September 2003 Wireless Infrastructure Products User s Guide SWRU007 ...

Page 2: ...tute a license from TI to use such products or services or a warranty or endorsement thereof Use of such information may require a license from a third party under the patents or other intellectual property of the third party or a license from TI under the patents or other intellectual property of TI Reproduction of information in TI data books or data sheets is permissible only if reproduction is...

Page 3: ... handling or use of the goods Please be aware that the products received may not be regulatory compliant or agency certified FCC UL CE etc Due to the open construction of the product it is the user s responsibility to take any and all appropriate precautions with regard to electrostatic discharge EXCEPT TO THE EXTENT OF THE INDEMNITY SET FORTH ABOVE NEITHER PARTY SHALL BE LIABLE TO THE OTHER FOR A...

Page 4: ...nty as to the load specification please contact a TI field representative During normal operation some circuit components may have case temperatures greater than 40 C The EVM is designed to operate properly with certain components above 40 C as long as the input and output ranges are maintained These components include but are not limited to linear regulators switching transistors pass transistors...

Page 5: ...Circuit Description 3 1 3 1 Circuit Function 3 2 3 1 1 Input Clock 3 2 3 1 2 Input Data 3 2 3 1 3 Output Data 3 3 3 1 4 Internal Reference Operation 3 4 3 1 5 External Reference Operation 3 4 3 1 6 Sleep Mode 3 4 3 1 7 Filter Control 3 4 3 1 8 PLL Divider Control 3 4 4 Schematics 4 1 Tables 2 1 DAC5674 EVM Parts List 2 5 3 1 EVM Clock Configuration 3 2 3 2 Input Connector J8 3 3 3 3 Transformer Ou...

Page 6: ...Contents vi Figures 2 1 Top Layer 1 2 2 2 2 Ground Plane 2 3 2 3 Power Plane 2 3 2 4 Bottom Layer 2 4 ...

Page 7: ...of the DAC5674 evaluation module EVM and provides a general description of the features and functions to be considered while using this module Topic Page 1 1 Purpose 1 2 1 2 EVM Basic Functions 1 2 1 3 Power Requirements 1 2 1 4 DAC5674 EVM Operational Procedure 1 3 Chapter 1 ...

Page 8: ...nnections to the EVM are via banana jack sockets Separate sockets are provided for the analog digital PLL and I O supply In addition to the internal bandgap reference provided by the DAC5674 device options on the EVM allow external reference to be provided to the DAC 1 3 Power Requirements The demonstration board has four power inputs The first 3 3VA is required to be 3 3 Vdc at banana jack J9 wit...

Page 9: ...ing factory set configuration Differential clock mode using transformer T2 and a clock input at J4 Transformer coupled output using transformer T1 The converter is set to operate with internal reference Jumper W2 is installed between pins 1 and 2 Full scale output current set to 20 mA through RBIAS resistor R1 The DAC5674 output is enabled sleep mode disabled Jumper W3 is installed between pins 1 ...

Page 10: ...1 4 ...

Page 11: ...d Parts List PCB Layout and Parts List This chapter describes the physical characteristics and PCB layout of the EVM and lists the components used on the module Topic Page 2 1 PCB Layout 2 2 2 2 Parts List 2 5 Chapter 2 ...

Page 12: ...Layout 2 2 2 1 PCB Layout The EVM is constructed on a 4 layer 3 3 inch 5 75 inch 0 062 inch thick PCB using FR 4 material Figure 2 1 through Figure 2 4 show the PCB layout for the EVM Figure 2 1 Top Layer 1 ...

Page 13: ...PCB Layout 2 3 PCB Layout and Parts List Figure 2 2 Layer 2 Ground Plane Figure 2 3 Layer 3 Power Plane ...

Page 14: ...PCB Layout 2 4 Figure 2 4 Bottom Layer ...

Page 15: ...74 1 DAC5674IDW TI U1 Ferrite bead 4 D01608C 472 Coil Craft FB1 FB4 3POS header 4 TSW 150 07 L S Samtec W2 W5 40 pin header 1 TSW 120 07 L D Samtec J8 Red banana jacks 4 ST 351A Allied J9 J10 J12 J14 Black banana jacks 4 ST 351B Allied J11 J13 J15 J16 Green LED 5 LN1351C TR Panasonic D1 D5 0 Ω 1 16 W 1 resistor 1 ERJ 3EKF0R00V Panasonic R6 R5 R7 R10 R34 R36 10 Ω 1 16 W 1 resistor 1 ERJ 3EKF10R0 Pa...

Page 16: ...04M Panasonic S1 Switch 1 SD05HOSK CK S2 SMA connectors 3 713 4339 901 144 8RFX Allied J2 J4 J7 J1 J3 J5 J6 SN74LVC04A 1 SN74LVC04APW TI U2 Standoff hex 1 4 1 4 219 2063 Allied Black test point 3 5001K Keystone TP3 TP4 TP5 Red test point 3 5000K Keystone TP1 TP2 TP6 Transformer 1 T1 1T KK8 Mini Circuits T1 Transformer 1 TCM4 1 Mini Circuits T2 ...

Page 17: ...3 1 Circuit Description Circuit Description This chapter provides descriptions of the primary functional circuits on the DAC5674 EVM Topic Page 3 1 Circuit Function 3 2 Chapter 3 ...

Page 18: ...to input the external differential ECL PECL clock signals 3 1 1 2 Single Ended Input Clock The EVM can be configured for single ended input clock mode by configuring the board per Table 3 1 SMA connector J3 or header J8 can be used to input the external TTL CMOS clock signal Table 3 1 EVM Clock Configuration Clock Configuration Components Installed Components Not Installed Sinewave Default R12 T2 ...

Page 19: ...of the demonstration board provides the user with a single ended output signal at SMA connector J7 The DAC5674 is configured to drive a doubly terminated 50 Ω cable using a 1 1 impedance ratio transformer a 100 Ω terminating resistor R2 and the center tap of T1 connected to ground per Table 3 3 When using a 4 1 impedance ratio transformer configure the EVM per Table 3 3 The common mode input volta...

Page 20: ...SLWS148 for details 3 1 6 Sleep Mode The DAC5674 EVM provides a means of placing the DAC5674 into a power down mode This mode is activated by placing jumper W3 between pins 2 and 3 3 1 7 Filter Control The DAC5674 has two inputs HP1 and HP2 which control the internal interpolation filters FIR1 and FIR2 mode of operation When these inputs are set to a logic high the filters are configured for high ...

Page 21: ...4 1 Schematics Schematics This chapter contains the EVM schematic diagrams Chapter 4 ...

Page 22: ... 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 J8 40PIN_IDC 1 16 2 15 3 14 4 13 5 12 6 11 7 10 8 9 RP1 22 1 16 2 15 3 14 4 13 5 12 6 11 7 10 8 9 RP2 22 D0_IN D1_IN D2_IN D3_IN D4_IN D5_IN D6_IN D7_IN D8_IN D9_IN D10_IN D11_IN D12_IN D13_IN 1 8_3 3VD RESET S1 SW PB R13 10K 1 8_3 3VD C18 1uF C6 1uF 3 3VCLK C10 1uF C4 1uF 3 3VCLK R11 200 1 C23 100 pF C24 01uF TP1 RED R1 2K C2 1uF 1 8_3 ...

Page 23: ... 10uF C34 1uF C38 1uF C42 01uF DAC5674 3VA B 2 3 3VD J12 RED J15 BLACK J9 RED J11 BLACK 3 3V ANALOG 1 8V 3 3V DIGITAL TP3 BLACK TP4 BLACK TP5 BLACK C46 47 uF C48 47 uF 3 3VCLK C31 10uF C35 1uF C39 1uF C43 01uF VCLK J10 RED J13 BLACK 3 3V CLOCK C47 47 uF 1 8VD C33 10uF C37 1uF C41 1uF C45 01uF 18VD J14 RED J16 BLACK 1 8VD C49 47 uF J SETON Y DEWONCK FB1 FERRITE FB3 FERRITE FB2 FERRITE FB4 FERRITE ...

Page 24: ...4 5 J5 SMA 1 2 3 4 5 J4 SMA C52 01uF C56 01uF C55 01uF E1 R25 49 9 C57 1uF R27 49 9 C58 1uF VTT VTT Note 1 CLK CLKC CLK CLKC R16 1K 1 2 7 14 U2A SN74LVC04A 9 8 U2D SN74LVC04A 13 12 U2F SN74LVC04A R21 200 R22 200 R23 200 D3 GREEN D4 GREEN D5 GREEN DIV0 DIV1 HP1 HP2 X4 INPUT CLOCK Note 1 Note 1 DAC5674 B 3 3 J SETON Y DEWONCK 3 3VCLK NOTE 1 PART IS NOT INSTALLED Note 1 R34 0 SCLK SCLK Note 1 C27 1uF...

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