Texas Instruments CDCE421EVM User Manual Download Page 13

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7

Configuring the Board

7.1

Programming and Testing Configuration (USB Cable Attached)—Default Configuration

7.2

Programming Configuration (USB Cable Attached)

AUX

Using external
3.3V supply

Using only USB
power supply

7.3

Testing Configuration from a Saved Configuration (with USB Cable Removed After

Configuring the Board

The CDCE421EVM can be powered from the USB power supply or from an external source. The
CDCE421EVM only needs a USB cable attached for programming purposes; however, for test
measurements it is recommended to also use an external 3.3V power supply. Test measurements can
also be taken with only the USB supplied power. Note that because of USB power variance, results may
degrade. It is also possible to program the CDCE421 and then disconnect the USB cable with minor board
configuration changes. To enable power and programming of any of the four blocks on the
CDCE421EVM, the respective switch must be turned on

as explained earlier.

By default, the CDCE421EVM is configured to operate with the USB cable attached and a 3.3V power
supply added to AUX VDD and GND. In this configuration, the USB microcontroller is powered by the USB
port 5V supply while the CDCE421 is powered by the 3.3V external supply. This setup is optimal for
programming the CDCE421 device while also taking measurements. This configuration removes the
power variations inherent with USB power supplies by isolating the CDCE421 from the USB supply.

The CDCE421EVM can also use power supplied through the USB cable as its sole power source.
However, because of power-supply variance in the USB supply, this configuration is not recommended for
most measurements. Users are advised to enable this setup for saving configuration settings to the
CDCE421 and later powering the device from its internal memory. (This option is useful if there is not a
USB port available in a lab or test area.) In this configuration, JP1 must be moved from its default position
to the new position shown in

Figure 8

. The Enable onboard power checkbox must be selected on the

EVM software, followed by pushing the Apply button (see

Figure 5

).

Figure 8. JP1 Setting for USB Programming Configuration

Programming)

When operating the CDCE421 without the USB programming cable (useful in lab settings where a PC is
not immediately available at a lab station), the CDCE421EVM must be preprogrammed in one of the two
configurations discussed above, and then reconfigured for external power supply usage.

Before making these board modifications, the CDCE421 settings must be saved with one of the two USB
cable attached configurations. The Write Chronos Settings to EEPROM NO LOCKING software button
must be used to save the CDCE421 settings to its internal EEPROM. After the settings are saved, the
USB cable can be removed. Once the cable has been disconnected, JP1 should be in the Using External
3.3V Supply 
position (as shown in

Figure 8

). The EVM is now ready for use without the USB cable

connected. The CDCE421 will always start from its saved configuration state in this mode.

If the CDCE421 must be isolated from the microcontroller, the switch corresponding to the block in use
should be set to OFF for CE_xSDATA_x, and LVPECL_TERM_x where represents the block name
(see

Figure 9

). The power line switch for the respective block, however, should remain on. This sequence

also allows the user to remove the USB cable without affecting performance while the CDCE421 is
powered on.

SCAU020 – March 2007

10.9MHz–1175MHz Low Phase Noise Clock Evaluation Board

13

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Summary of Contents for CDCE421EVM

Page 1: ...10 9MHz 1175MHz Low Phase Noise Clock Evaluation Board User s Guide March 2007 Serial Link Products SCAU020...

Page 2: ...2 SCAU020 March 2007 Submit Documentation Feedback...

Page 3: ...nabled Automatic PLL Selection 9 6 2 Manual PLL Block Selection Advanced Control 11 7 Configuring the Board 13 7 1 Programming and Testing Configuration USB Cable Attached Default Configuration 13 7 2...

Page 4: ...op Up 10 7 Chronos GUI Manual PLL Block Selection Pop Up 11 8 JP1 Setting for USB Programming Configuration 13 9 CDCE421EVM Block Switch Off 14 10 CDCE421EVM Board Schematic 15 11 CDCE421EVM Board Blo...

Page 5: ...try that operates in conjunction with an external AT cut crystal to produce a stable frequency reference for the PLL based frequency synthesizer A 3 3V LVCMOS level input can also be used instead of a...

Page 6: ...the respective switches in the same manner The CDCE421 output frequency is always an integer multiple or integer divide of the input frequency and is determined through selection of VCO1 or VCO2 and t...

Page 7: ...rth block D includes a socket fitting the oscillator part used in Block C The provided EVM software is controlled through a graphical user interface GUI The software allows users to easily send comman...

Page 8: ...Setup msi file available on the CD shipped with the EVM Figure 3 appears Be sure to note the installation folder the USB driver must be installed in the same after setup completes and the USB cable is...

Page 9: ...tware GUI The software illustration Figure 5 shows the on chip PLL structure of the CDCE421 Through this screen the user can change the Input Frequency PFD Charge Pump Loop Filter and Output Type The...

Page 10: ...reference input to the CDCE421 for example from an oscillator or crystal the maximum bandwidth and phase margin setting must be used 400kHz bandwidth and 80 degrees The Phase Frequency Detector PFD ch...

Page 11: ...al blocks within the PLL If a user is familiar with PLL operation one may activate individual control of the PLL blocks by clicking on the Advanced Control button activating the window shown in Figure...

Page 12: ...ould be kept at 0000 ibias_100ua Other settings are for TI use only Chronos IC Config Select Use U13 programming socket for rapid programming of Chronos enabled devices Select Use U8 DIE U9 QFN socket...

Page 13: ...vised to enable this setup for saving configuration settings to the CDCE421 and later powering the device from its internal memory This option is useful if there is not a USB port available in a lab o...

Page 14: ...14 show the printed circuit board PCB schematics Note Board layouts are not to scale These figures are intended to show how the board is laid out they are not intended to be used for manufacturing CDC...

Page 15: ...www ti com Schematics and Layout Figure 10 CDCE421EVM Board Schematic SCAU020 March 2007 10 9MHz 1175MHz Low Phase Noise Clock Evaluation Board 15 Submit Documentation Feedback...

Page 16: ...www ti com Schematics and Layout Figure 11 CDCE421EVM Board Block A Schematic 16 10 9MHz 1175MHz Low Phase Noise Clock Evaluation Board SCAU020 March 2007 Submit Documentation Feedback...

Page 17: ...www ti com Schematics and Layout Figure 12 CDCE421EVM Board Block B Schematic SCAU020 March 2007 10 9MHz 1175MHz Low Phase Noise Clock Evaluation Board 17 Submit Documentation Feedback...

Page 18: ...www ti com Schematics and Layout Figure 13 CDCE421EVM Board Block C Schematic 18 10 9MHz 1175MHz Low Phase Noise Clock Evaluation Board SCAU020 March 2007 Submit Documentation Feedback...

Page 19: ...www ti com Schematics and Layout Figure 14 CDCE421EVM Board Block D Schematic SCAU020 March 2007 10 9MHz 1175MHz Low Phase Noise Clock Evaluation Board 19 Submit Documentation Feedback...

Page 20: ...oduct This notice contains important safety information about temperatures and voltages For additional information on TI s environmental and or safety programs please contact the TI application engine...

Page 21: ...iness practice TI is not responsible or liable for any such statements TI products are not authorized for use in safety critical applications such as life support where a failure of the TI product wou...

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