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CC1000
SWRS048A Page 15 of 55
10. Microcontroller Interface
Used in a typical system,
CC1000
will
interface to a microcontroller. This
microcontroller must be able to:
•
Program
CC1000
into different modes
via the 3-wire serial configuration
interface (PDATA, PCLK and PALE).
•
Interface to the bi-directional
synchronous data signal interface
(DIO and DCLK).
•
Optionally the microcontroller can do
data encoding / decoding.
•
Optionally the microcontroller can
monitor the frequency lock status from
pin CHP_OUT (LOCK).
•
Optionally the microcontroller can
monitor the RSSI output for signal
strength acquisition.
10.1 Connecting the microcontroller
The microcontroller uses 3 output pins for
the configuration interface (PDATA, PCLK
and PALE). PDATA should be a bi-
directional pin for data read-back. A bi-
directional pin is used for data (DIO) to be
transmitted and data received. DCLK
providing the data timing should be
connected to a microcontroller input.
Optionally another pin can be used to
monitor the LOCK signal (available at the
CHP_OUT pin). This signal is logic level
high when the PLL is in lock. See
Also the RSSI signal can be connected to
the microcontroller if it has an analogue
ADC input.
The microcontroller pins connected to
PDATA and PCLK can be used for other
purposes when the configuration interface
is not used. PDATA and PCLK are high
impedance inputs as long as PALE is
high.
PALE has an internal pull-up resistor and
should be left open (tri-stated by the
microcontroller) or set to a high level
during power down mode in order to
prevent a trickle current flowing in the pull-
up. The pin state in power down mode is
summarized in Table 3.
Pin
Pin state
Note
PDATA
Input
Should be driven high or low
PCLK
Input
Should be driven high or low
PALE
Input with internal pull-
up resistor
Should be driven high or high-impedance to minimize
power consumption
DIO
Input
Should be driven high or low
DCLK High-impedance
output
Table 3. CC1000 pins in power-down mode
CC1000
PDATA
PCLK
PALE
DIO
CHP_OUT
(LOCK)
Micro-
controller
DCLK
(Optional)
RSSI/IF
(Optional)
ADC
Figure 6. Microcontroller interface