background image

4.2 Schematic

The BQ25306 schematic is shown in 

Figure 4-7

.

1

2

J2

VSET_FB

REGN

VSET_FB

Green

1

2

D2
LED

STAT

TS

VBUS

PMID

BAT

STAT

BTST

TS

GND

BAT

ICHG

SW

0.047uF

C2

10uF

C5

10uF

C4

REGN

BAT

TP4

5010

TP5

5014

TP6

5012

TP7

5012

TP10

5011

TP12

5011

TP9

5019

TP11

5019

0

R2

GND

STAT

GND

GND

GND

ICHG

2.2uF

C6

2.2uF

C7

2.2uF

C11

1

2

3

J1

ICHG

STAT

GND

SW

EXT_TS

GND

BAT

VSET_FB

0.01uF

C10

VBUS

PMID

VSET_FB

REGN

VBUS

4.20VBAT

TP3

TP2

TP1

FB_GND

1
2
3

JP1

EN

EN

POL

POL

TP8

5012

FB_GND

VSET_FB

10µF

C8

10µF

C9

EN_CTRL

VBUS

1

STAT

3

ICHG

4

FB

9

POL

5

BAT

10

TS

7

FB_GND

8

EN

6

SW

14

GND

11

GND

12

SW

13

BTST

15

REGN

2

PMID

16

PAD

17

BQ25306RTER

U1

0.1uF

C3

GND

GND

GND

GND

GND

REGN

TS

1
2
3

JP3

EN_CTRL

REGN

GND

1
2

JP4

1
2

JP5

1
2

JP9

EXT_TS

1
2

JP7

1
2

JP8

1
2

JP6

1
2

JP10

0

R8

1
2

JP2

40.2k

R10

20.0k

R11

10.2k

R3

51.1k

R4

30.9k

R13

10.2k

R14

5.23k

R7

2.20k

R9

1.33M

R6

200k

R12

562k

R5

BAT

1.00

R1

510pF

C1

30V

D1

GND

L1

470pF

C12

Figure 4-7. BQ25306 Schematic

www.ti.com

Board Layout, Schematic, and Bill of Materials

SLUUC50A – MARCH 2020 – REVISED DECEMBER 2020

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BQ25306 (BMS005) Evaluation Module

9

Copyright © 2020 Texas Instruments Incorporated

Summary of Contents for BQ25306EVM

Page 1: ...erials 6 4 1 Board Layout 6 4 2 Schematic 9 4 3 Bill of Materials 10 5 Revision History 13 List of Figures Figure 2 1 Original Test Setup for BMS005 004 3 Figure 2 2 BQ25306EVM 1 Cell Efficiency 5 Fig...

Page 2: ...n 1 2 POL pull down to GND Shunt Not Installed SH JP3 EN external VDD rail selection EN_CTRL 1 2 pulls EN_CTRL to external voltage supply connected to JP3 1 2 3 pulls EN_CTRL to REGN Shunt Not Install...

Page 3: ...A current limit and then turn off the supply 3 Set PS2 for 3 V DC 2 A current limit and then turn off the supply 4 Connect the output of PS1 to J2 VBUS and PGND as shown in Figure 2 1 5 Connect a vol...

Page 4: ...4 Battery Temperature Monitoring Verification 1 Connect PS2 across TS TP7 and PGND TP12 Turn on PS2 and take measurements as follows a Measure VTS TS TP7 and PGND TP12 3V 0 1V b Observe STAT LED D2 o...

Page 5: ...elying on the digital readouts of the power supply 3 When using a source meter that can source and sink current as your battery simulator TI highly recommends adding a large 1000 F capacitor at the EV...

Page 6: ...exposed power pad on the backside of the IC package be soldered to the PCB ground Ensure that there are sufficient thermal vias directly under the IC connecting to the ground plane on the other layer...

Page 7: ...m Layer Figure 4 5 Bottom Solder www ti com Board Layout Schematic and Bill of Materials SLUUC50A MARCH 2020 REVISED DECEMBER 2020 Submit Document Feedback BQ25306 BMS005 Evaluation Module 7 Copyright...

Page 8: ...om Overlay Board Layout Schematic and Bill of Materials www ti com 8 BQ25306 BMS005 Evaluation Module SLUUC50A MARCH 2020 REVISED DECEMBER 2020 Submit Document Feedback Copyright 2020 Texas Instrument...

Page 9: ...VSET_FB 10 F C8 10 F C9 EN_CTRL VBUS 1 STAT 3 ICHG 4 FB 9 POL 5 BAT 10 TS 7 FB_GND 8 EN 6 SW 14 GND 11 GND 12 SW 13 BTST 15 REGN 2 PMID 16 PAD 17 BQ25306RTER U1 0 1uF C3 GND GND GND GND GND REGN TS 1...

Page 10: ...ptacle 3x1 3 81mm R A TH Term Block 3 pos 1727023 Phoenix Contact J2 1 Conn Term Block 2POS 3 81mm TH 2POS Terminal Block 1727010 Phoenix Contact JP1 JP3 2 Header 100mil 3x1 Tin TH Header 3 PIN 100mil...

Page 11: ...e Testpoint 5012 Keystone TP2 TP4 2 Test Point Multipurpose Red TH Red Multipurpose Testpoint 5010 Keystone TP3 1 Test Point Multipurpose Orange TH Orange Multipurpose Testpoint 5013 Keystone TP5 1 Te...

Page 12: ...0 1 00 RES 1 00 1 0 063 W AEC Q200 Grade 0 0402 0402 CRCW04021R00F KED Vishay Dale R3 0 10 2k RES 10 2 k 1 0 063 W AEC Q200 Grade 0 0402 0402 CRCW040210K2F KED Vishay Dale R4 0 51 1k RES 51 1 k 1 0 06...

Page 13: ...version Changes from Revision March 2020 to Revision A December 2020 Page Changed from Advance Information to Production Data 2 www ti com Revision History SLUUC50A MARCH 2020 REVISED DECEMBER 2020 Su...

Page 14: ...ther than TI b the nonconformity resulted from User s design specifications or instructions for such EVMs or improper system design or c User has not paid on time Testing and other quality control tec...

Page 15: ...These limits are designed to provide reasonable protection against harmful interference in a residential installation This equipment generates uses and can radiate radio frequency energy and if not in...

Page 16: ...instructions set forth by Radio Law of Japan which includes but is not limited to the instructions below with respect to EVMs which for the avoidance of doubt are stated strictly for convenience and s...

Page 17: ...any interfaces electronic and or mechanical between the EVM and any human body are designed with suitable isolation and means to safely limit accessible leakage currents to minimize the risk of electr...

Page 18: ...R DAMAGES ARE CLAIMED THE EXISTENCE OF MORE THAN ONE CLAIM SHALL NOT ENLARGE OR EXTEND THIS LIMIT 9 Return Policy Except as otherwise provided TI does not offer any refunds returns or exchanges Furthe...

Page 19: ...e resources are subject to change without notice TI grants you permission to use these resources only for development of an application that uses the TI products described in the resource Other reprod...

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