www.ti.com
4.3
Test Procedure
Test Summary
1. Verify that the equipment is set up according to Equipment Setup,
2. Set jumpers on the UUT as follows: JMP1 to 0.5; JMP2 to HI; JMP3 to EN; install jumpers on JMP4
through JMP6.
3. Adjust R_DPPM until TP1 is 36.5 k
Ω
±0.1 k
Ω
with respect to GND, and adjust R_TMR until TP2 is
50 k
Ω
with respect to GND.
4. Verify that V
OUT
is approximately equal to V
BAT
(if V
OUT
< 1.1 V, the output is in short-circuit mode. To
get out of this mode, momentarily disconnect the 10-
Ω
load).
5. Power up the 5.25-VDC supply to the UUT.
6. Verify V
BAT
is between 2.4 VDC and 3 VDC, and the charger is in pre-charge state: LEDs STAT1 (D2),
STAT2 (D3), and ACPG (D1) are on.
If V
BAT
is above the low-voltage threshold (V
(LOWV)
~3 V), then the IC is in fast-charge mode [STAT2
(D3) is off (High)]. If the IC is in fast charge, skip to step 10.
7. Verify I
BAT
is ~0.1 A (I
BAT
~ = I
IN
– (V
OUT
/ R
OUT
) – 0.01 A)
8. Verify V
OUT
is between 4.3 VDC and 4.5 VDC.
9. Verify V
LDO
(TP4) is between 3.2 VDC and 3.4 VDC.
10. Allow the battery to charge until V
BAT
is between 3.2 VDC and 4.0 VDC. The charger should deliver
the programmed constant current to the battery unless the input cannot source the required current.
11. Verify D3 (STAT2) has turned off.
12. Verify I
BAT
is ~1.0 A [for a 10-k
Ω
resistor on ISET1, I
BAT
~ = I
IN
– (V
OUT
/ R
OUT
) – 0.01 A].
13. Apply a short between J3-4 (CE) and J3-3 (GND) on the UUT. This overrides the JMP3 100-k
Ω
pullup,
disables the charging, puts the IC in low-power mode, and connects the battery to the OUT pin. Note
that if CE is floated (JMP3 is removed and J3-3 to 4 connection is removed), the IC may bounce
between the charging and disabled states. Verify on the scope that V
OUT
does not drop out when
switching between the input source and the battery source.
14. Verify D2 (STAT1) has turned off.
15. Verify I
IN
drops below 10 mA [should be < 200 µA into the IC if PG LED (current) JMP6 is removed].
16. Verify V
OUT
is within –50 mV of V
BAT
.
17. Remove short betwen J3-4 and J3-3 on UUT. Verify on the scope that V
OUT
does not drop out. Verify
D2 (STAT1) has turned on, charging has resumed, and V
OUT
is powered from the input.
18. Disconnect the 5.25-VDC input supply from the UUT IN input. Verify on the scope that V
OUT
does not
drop out. Verify V
OUT
is within –50 mV of V
BAT
and D2 (STAT1) and D1 (PG) LEDs turn off. This
demonstrates battery power backup for loss of adapter power.
19. Reapply the +5.25-VDC supply to the UUT IN input. Verify on the scope that V
OUT
does not drop out.
Verify D2 (STAT1) and D1 (PG) LEDs turn on.
20. Reduce the current limit on the input supply to ~ 1 A (going to the IN pin on the UUT) and verify on the
scope that V
OUT
has dropped to the VDPPM level of ~4.2 V [(3.65 V at TP1) × 1.15 = 4.2 V]. Note that
the current into the battery is ~ 580 mA (1-A input minus 420 mA to the system), which has been
reduced to keep the output from falling below the programmed DPPM OUTPUT threshold of 4.2 V.
This demonstrates DPPM operation (charging current to the battery is reduced if output drops to the
DPPM OUTPUT voltage threshold attempting to keep the output voltage from dropping further).
21. Further reduce the input current limit to 250 mA. Verify on the scope that V
OUT
does not drop out.
Verify that V
OUT
drops just below V
BAT
(< 50 mV). Because the available input current is less than the
system OUT load, reducing the battery charging current to zero is still not enough reduction in load to
keep the output from dropping. Once the output drops below ~ 50 mV, the internal battery FET turns
on and allows the battery to source the OUT pin system load. This demonstrates battery supplement
mode.
22. Return the current limit of the 5.25-V supply to ~2 A. Verify V
OUT
returns to ~4.4 V.
23. Set JMP2 (MODE) to LO (USB mode). Verify that the input current, I
IN
, drops to between 400 mA and
500 mA. The programmed charge current of ~1 A and the system load of 10
Ω
exceeds the USB-mode
0.5-A limit; therefore, V
OUT
drops until the DPPM OUTPUT voltage threshold, or battery voltage, is
reached (whichever is higher). If the DPPM OUTPUT threshold is higher, the charging current is
reduced to keep the output voltage from dropping further. If the battery voltage is higher, the battery
supplements the current to keep the output from dropping too much (20 mV to 200 mV) below the
battery voltage.
4
bq24070 1.5-A Single-Chip Li-Ion and Li-Pol Charge Management IC EVM
SLUU248 – May 2006
