Texas Instruments BP-DAC11001EVM, User Manual

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DAC110 01
RC
FILTER
REF625 0
EXTERNAL
REFERENCE
REFP
REFN
REF_PWR
REFGND
AGND
REF_VCC REF_VSS
AGND
DGND
OUT_VCC OUT_VSS
AGND-OUT
BUFFE RE D
DAC
OUTPUT
SW
FILTGND
FILT_VCC FILT_VSS
FILTER1
FILTER2
AUXGND
VCC VSS VDD VIO
DGND AGND
INTERFACE FOR
AUXILIARY
CIRCUIT
VREFP VREFN
VCC VSS
VDD
VIO REF_PWR
REFGND AGND
VCC VSS DVDD IOVDD
AVDD
EXTERNAL
LDAC
SPI
DGND
LAUNCHP AD
INTERFACE
AEV M_3V3
AEV M_5V0
VDD
IOVDD
VDD
DVDD
VDD DVDD
Detailed Description
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8 SLAU806 – October 2019
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BP-DAC11001EVM
3 Detailed Description
3.1 Hardware Description
The following subsections provide detailed information on the EVM hardware and jumper configuration
settings.
3.1.1 Theory of Operation
The block diagram of the BP-DAC11001EVM board is displayed in Figure 6 . The dotted lines indicate
different power and ground domains. All grounds are shorted together using single-point shorts. The EVM
board connects to the launchpad with the BoosterPack connectors. There is an onboard reference, using
the
REF6250 , that generates a 5-V voltage reference, that in turn is converted to 5-V and –5-V reference
inputs for the DAC. There is an option for an external reference using connectors J27 and J28. Both J27
and J28 form a force-sense pair that eliminate cable losses while connected to external reference
sources. The DAC output is provided on J3. Jumper J2 provides various feedback options for the output
amplifier. The DAC output can be taken through two-stage, second-order filters using connectors J7 and
J8. There is an option to interface an external circuit using auxiliary connectors J23 and J24.
Figure 6. BP-DAC11001EVM Hardware Block Diagram