Texas Instruments AN-1650 LM34919 User Manual Download Page 2

t

ON

 =

V

IN

 - 1.5V

1.13 x 10

-10

 

x

 

(R1 + 1.4 k

:

)

+ 100 ns

Theory of Operation

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2

Theory of Operation

Refer to the evaluation board schematic in

Figure 5

, which contains a simplified block diagram of the

LM34919. When the circuit is in regulation, the buck switch is on each cycle for a time determined by R1
and VIN according to the equation:

(1)

The on-time of this evaluation board ranges from

875 ns at VIN = 8V, to

231 ns at VIN = 40V. The on-

time varies inversely with VIN to maintain a nearly constant switching frequency. At the end of each on-
time the Minimum Off-Timer ensures the buck switch is off for at least 155 ns. In normal operation, the off-
time is much longer. During the off-time, the load current is supplied by the output capacitor (C7, C8).
When the output voltage falls sufficiently that the voltage at FB is below 2.5V, the regulation comparator
initiates a new on-time period. For stable, fixed frequency operation, a minimum of 25 mV of ripple is
required at FB to switch the regulation comparator. The current limit threshold, is

640 mA at Vin = 8V,

and

730 mA at Vin = 40V. The variation is due to the change in ripple current amplitude as Vin varies.

Refer to the LM34919 data sheet for a more detailed block diagram, and a complete description of the
various functional blocks.

3

Board Layout and Probing

The pictorial in

Figure 1

shows the placement of the circuit components. The following should be kept in

mind when the board is powered:

1) When operating at high input voltage and high load current, forced air flow may be necessary.

2) The LM34919, and diode D1 may be hot to the touch when operating at high input voltage and high
load current.

3) Use CAUTION when probing the circuit at high input voltages to prevent injury, as well as possible
damage to the circuit.

4) At maximum load current (0.6A), the wire size and length used to connect the load becomes important.
Ensure there is not a significant drop in the wires between this evaluation board and the load.

4

Board Connection/Start-up

The input connections are made to the J1 connector. The load is connected to the J2 (OUT) and J3
(GND) terminals. Ensure the wires are adequately sized for the intended load current. Before start-up a
voltmeter should be connected to the input terminals, and to the output terminals. The load current should
be monitored with an ammeter or a current probe. It is recommended that the input voltage be increased
gradually to 8V, at which time the output voltage should be 5V. If the output voltage is correct with 8V at
VIN, then increase the input voltage as desired and proceed with evaluating the circuit. DO NOT EXCEED
40V AT VIN.

5

Output Ripple Control

The LM34919 requires a minimum of 25 mVp-p ripple at the FB pin, in phase with the switching waveform
at the SW pin, for proper operation. The required ripple can be supplied from ripple at V

OUT

, through the

feedback resistors as described in Options A and B below, or the ripple can be generated separately
(using R5, C9, and C10) in order to keep the ripple at V

OUT

at a minimum (Option C).

Option A) Lowest Cost Configuration: This evaluation board is supplied with R4 installed in series with
the output capacitance (C7, C8). Since

25 mVp-p are required at the FB pin, R4 is chosen to generate

50 mVp-p at V

OUT

, knowing that the minimum ripple current in this circuit is

155 mAp-p at minimum V

IN

.

Using 0.39

for R4, the ripple at V

OUT

ranges from

60 mVp-p to

140 mVp-p over the input voltage

range. If the application can accept this ripple level, this is the most economical solution. The circuit is
shown in

Figure 2

and

Figure 8

.

2

AN-1650 LM34919 Evaluation Board

SNVA250A – June 2007 – Revised April 2013

Submit Documentation Feedback

Copyright © 2007–2013, Texas Instruments Incorporated

Summary of Contents for AN-1650 LM34919

Page 1: ...all components except R5 C9 and C10 These components provide options for managing the output ripple as described later in this document The board s specification are Input Voltage 8V to 40V Output Voltage 5V Maximum load current 600 mA Minimum load current 0A Current Limit 640 mA to 730 mA Measured Efficiency 92 7 VIN 8V IOUT 300 mA Nominal Switching Frequency 800 kHz Size 2 6 in x 1 6 in x 0 5 in...

Page 2: ...o the circuit 4 At maximum load current 0 6A the wire size and length used to connect the load becomes important Ensure there is not a significant drop in the wires between this evaluation board and the load 4 Board Connection Start up The input connections are made to the J1 connector The load is connected to the J2 OUT and J3 GND terminals Ensure the wires are adequately sized for the intended l...

Page 3: ...tion Since the output ripple is passed by Cff to the FB pin with little or no attenuation R4 can be reduced so the minimum ripple at VOUT is 25 mVp p The minimum value for Cff is calculated from 2 where tON max is the maximum on time at minimum VIN and R2 R3 is the parallel equivalent of the feedback resistors See Figure 8 Option C Minimum Ripple Configuration To obtain minimum ripple at VOUT R4 i...

Page 4: ...is 3000 to 5000 pF and R5 is 10kΩ to 300 kΩ C9 is chosen large compared to C10 typically 0 1 µF See Figure 4 and Figure 8 Figure 4 Minimum Output Ripple Configuration 6 Monitor The Inductor Current The inductor s current can be monitored or viewed on a scope with a current probe Remove R6 and install an appropriate current loop across the two large pads where R6 was located In this way the inducto...

Page 5: ...603 0 1 µF 50V C4 Ceramic Capacitor TDK C1608X7R1H104K 0603 0 1 µF 50V C5 C6 Ceramic Capacitor TDK C1608X7R1H223K 0603 0 022 µF 50V C7 C8 Ceramic Capacitor TDK C3216X7R1C106K 1206 10 µF 16V C9 Ceramic Capacitor Unpopulated 0603 C10 Ceramic Capacitor Unpopulated 0603 D1 Schottky Diode Zetex ZLLS2000 SOT23 6 40V 2 2A L1 Power Inductor Bussman DR73 150 7 6 mm x 7 6 mm 15 µH 1 8A R1 Resistor Vishay CR...

Page 6: ...igure 6 Efficiency vs Load Current Figure 7 Efficiency vs Input Voltage Figure 8 Output Voltage Ripple 6 AN 1650 LM34919 Evaluation Board SNVA250A June 2007 Revised April 2013 Submit Documentation Feedback Copyright 2007 2013 Texas Instruments Incorporated ...

Page 7: ... 9 Switching Frequency vs Input Voltage Figure 10 Load Current Limit vs Input Voltage 7 SNVA250A June 2007 Revised April 2013 AN 1650 LM34919 Evaluation Board Submit Documentation Feedback Copyright 2007 2013 Texas Instruments Incorporated ...

Page 8: ...out 400 mA Figure 11 Continuous Conduction Mode Trace 4 VOUT Trace 3 inductor Current Trace 2 SW Pin Vin 24V Iout 20 mA Figure 12 Discontinuous Conduction Mode 8 AN 1650 LM34919 Evaluation Board SNVA250A June 2007 Revised April 2013 Submit Documentation Feedback Copyright 2007 2013 Texas Instruments Incorporated ...

Page 9: ...t 11 PC Board Layout Figure 13 Board Silkscreen Figure 14 Board Top Layer 9 SNVA250A June 2007 Revised April 2013 AN 1650 LM34919 Evaluation Board Submit Documentation Feedback Copyright 2007 2013 Texas Instruments Incorporated ...

Page 10: ...out www ti com Figure 15 Board Second Layer Viewed from Top 10 AN 1650 LM34919 Evaluation Board SNVA250A June 2007 Revised April 2013 Submit Documentation Feedback Copyright 2007 2013 Texas Instruments Incorporated ...

Page 11: ...esponsible for compliance with all legal regulatory and safety related requirements concerning its products and any use of TI components in its applications notwithstanding any applications related information or support that may be provided by TI Buyer represents and agrees that it has all the necessary expertise to create and implement safeguards which anticipate dangerous consequences of failur...

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