Texas Instruments AFE5809 User Manual Download Page 47 | Manualshive

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Texas Instruments AFE5809 User Manual Download Page 47

ALL Bypass Caps in

this circuit need to be

tied close to the pin.

This Circuit provides 3

options for populating

Op-Amps for maximum flexibility

CW I/V Amp

EVM Printed-Circuit Board Layouts and Schematics

Figure 46. Schematic (Sheet 10 of 10)

47

SLOU338A – October 2012 – Revised November 2012

AFE5809EVM Evaluation Module

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Copyright © 2012, Texas Instruments Incorporated

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Summary of Contents for AFE5809

Page 1: ...2 9 3 External Clock for CW Mode 23 9 4 External ADC Sampling Clock 23 10 External Vcntl 26 11 Board Configuration 27 11 1 I O Power Supply and USB 27 11 2 CW Mode ADC Clock 28 11 3 Vcntl Control Inpu...

Page 2: ...28 Vcntl 29 29 AFE5809EVM LED Location 30 30 AFE5809EVM Test Point Locations 31 31 Top Layer Signal 32 32 Second Layer Ground 33 33 Third Layer Power 34 34 Fourth Layer Signal 35 35 Fifth Layer Groun...

Page 3: ...quired Users need to provide the input signal for measurement from a signal generator Detail explanation regarding the jumpers connectors and test points appear in Section 11 The graphical user interf...

Page 4: ...hown in Figure 1 3 Software Installation and Operation The AFE5809EVM GUI SLOC254 can be downloaded from the TI Web site Follow the directions in the Read Me First pdf file to install the GUI and devi...

Page 5: ...5 V to the P1 connector After power up is complete five green LEDS and three red LEDS turn on as shown in Figure 3 Figure 3 LED Placement 5 SLOU338A October 2012 Revised November 2012 AFE5809EVM Eval...

Page 6: ...for new command Then LED41 and LED42 turn off and the rest of the LEDS remain on The GUI automatically configures the default setup Select the ADC page to observe the default condition Figure 4 Defau...

Page 7: ...igure 5 shows the Default Condition on the ADC window Figure 5 Default ADC State 7 SLOU338A October 2012 Revised November 2012 AFE5809EVM Evaluation Module Submit Documentation Feedback Copyright 2012...

Page 8: ...pling Rate in lower left should be set to 40 MHz this is the onboard CMOS clock frequency Set this appropriately if using an external clock ADC Input Frequency enter 2M Check the Auto Calculation of C...

Page 9: ...Verify that Maximum value is 16383 for 14 bit mode Repeat for Channel 2 and Channel 8 If each channel has the output as shown in Figure 8 proceed with the next step otherwise contact the TI FAE to tr...

Page 10: ...signal generator to 25 dBm Set the frequency of the signal generator to the value in the ADC Input Target Frequency field of the TSW GUI Change the window option to Hanning if using the onboard clock...

Page 11: ...rking correctly First setup hardware as follows USB cable connected to both EVMs External ADC clock enabled and used Sync external clock to analog sine burst source Connect analog input waveform to in...

Page 12: ...nd 20 cycles similar to Figure 11 Tektronix AFG3102 is recommended Adjust amplitude until there is no clipping of waveform Figure 11 Analog Sine Burst with 20 Cycles at 10 MHz 12 AFE5809EVM Evaluation...

Page 13: ...he AFE5809 GUI and the TSW GUI Also if the trigger is not strong enough to drive a 50 load the R83 may need to be removed from the AFE EVM Next import the TSW data into the AFE5809GUI for data process...

Page 14: ...de also look at the Separate Data tab to view the I Q separated Data Figure 13 Choose Trigger Mode 14 AFE5809EVM Evaluation Module SLOU338A October 2012 Revised November 2012 Submit Documentation Feed...

Page 15: ...FE5809 Figure 14 MSB and LSB Mismatch Raw Data for Sine Test Mode 15 SLOU338A October 2012 Revised November 2012 AFE5809EVM Evaluation Module Submit Documentation Feedback Copyright 2012 Texas Instrum...

Page 16: ...i com Figure 15 Sine Test Mode Output Seen in the Demodulator Plot 16 AFE5809EVM Evaluation Module SLOU338A October 2012 Revised November 2012 Submit Documentation Feedback Copyright 2012 Texas Instru...

Page 17: ...ti com TEST AFE5809 Figure 16 RF Test Mode Output 17 SLOU338A October 2012 Revised November 2012 AFE5809EVM Evaluation Module Submit Documentation Feedback Copyright 2012 Texas Instruments Incorporat...

Page 18: ...com Figure 17 Demod M 4 Both I and Q Data Test Mode Output Raw Data 18 AFE5809EVM Evaluation Module SLOU338A October 2012 Revised November 2012 Submit Documentation Feedback Copyright 2012 Texas Instr...

Page 19: ...EST AFE5809 Figure 18 Demod M 4 I Q Test Mode Separated Data 19 SLOU338A October 2012 Revised November 2012 AFE5809EVM Evaluation Module Submit Documentation Feedback Copyright 2012 Texas Instruments...

Page 20: ...ode www ti com 9 Hardware Setup CW Mode Figure 19 Setup for CW Mode 20 AFE5809EVM Evaluation Module SLOU338A October 2012 Revised November 2012 Submit Documentation Feedback Copyright 2012 Texas Instr...

Page 21: ...41 LED42 and LED43 on AFE5809EVM all illuminate Select 500 for the gain control feedback resistor Figure 20 Switching From Default ADC Mode Panel to CW Mode Panel 21 SLOU338A October 2012 Revised Nove...

Page 22: ...utputs J12 J13 display the frequency I and Q signals at 10 kHz as shown in Figure 21 The GUI Gain Control Feedback Resistor can be used to vary the amplitude of the outputs Figure 21 CW Outputs 22 AFE...

Page 23: ...ed Bottom layer of the EVM C100 Uninstalled Installed Bottom layer of the EVM C102 Uninstalled Installed Top layer of the EVM C29 Installed Uninstalled Top layer of the EVM C30 Installed Uninstalled T...

Page 24: ...synchronous then choose Rectangular as the Windowing option otherwise use Hanning or Hamming Notice the spectrum spreading with non coherence Figure 24 GUI Screen for Windowing Option Selection 24 AFE...

Page 25: ...etup CW Mode 5 The test procedure is the same for the CMOS ADC clock 25 SLOU338A October 2012 Revised November 2012 AFE5809EVM Evaluation Module Submit Documentation Feedback Copyright 2012 Texas Inst...

Page 26: ...o short the leftmost two pins A DC Voltage source is required to be connected to J14 Figure 25 External Vcntl Configuration 26 AFE5809EVM Evaluation Module SLOU338A October 2012 Revised November 2012...

Page 27: ...the test point for 5 V 5 V power supply JP3 Onboard 5 V enable The configuration must be set up as shown in Figure 2 in order to use onboard 5 V supply TP 5V 5 V supply test point 5VA 5 V supply test...

Page 28: ...int TP1 through TP4 Ground test points USB1 USB interface connector P13 P14 Test points for USB data bus From pin 1 to pin 9 the signals are D0 D4 D2 D1 D7 D5 D6 and D3 11 2 CW Mode ADC Clock Figure 2...

Page 29: ...o observe CW_VP_OUTP and CW_VP_OUTM before the external operational amplifier probe JP56 and JP57 JX1 This connector shows the signals of J12 and J13 simultaneously JP9 selects on_board_ADC CMOS clock...

Page 30: ...uffer Figure 29 AFE5809EVM LED Location Table 5 LED Indicators Reference Designator Power Supply Color LED 5V 5 V Green LED5V 5 V Green LED3 3VD 3 3 VD Orange LED3 3VA 3 3 VA Green LED1 8V 1 8 V Green...

Page 31: ...nd 3 Pins L5 M5 and M8 JP19 REFM voltage input JP44 RESET input Short to reset AFE5809 JP20 REFP voltage input JP21 REF_IN voltage input TP12 SDOUT TP3 9 SMA input probes TP5V TP18VD TP33VD TP33VA TP...

Page 32: ...t Board Layouts and Schematics Figure 31 through Figure 36 show the six layers of the AFE5809EVM board Figure 31 Top Layer Signal 32 AFE5809EVM Evaluation Module SLOU338A October 2012 Revised November...

Page 33: ...d Circuit Board Layouts and Schematics Figure 32 Second Layer Ground 33 SLOU338A October 2012 Revised November 2012 AFE5809EVM Evaluation Module Submit Documentation Feedback Copyright 2012 Texas Inst...

Page 34: ...Board Layouts and Schematics www ti com Figure 33 Third Layer Power 34 AFE5809EVM Evaluation Module SLOU338A October 2012 Revised November 2012 Submit Documentation Feedback Copyright 2012 Texas Instr...

Page 35: ...d Circuit Board Layouts and Schematics Figure 34 Fourth Layer Signal 35 SLOU338A October 2012 Revised November 2012 AFE5809EVM Evaluation Module Submit Documentation Feedback Copyright 2012 Texas Inst...

Page 36: ...Board Layouts and Schematics www ti com Figure 35 Fifth Layer Ground 36 AFE5809EVM Evaluation Module SLOU338A October 2012 Revised November 2012 Submit Documentation Feedback Copyright 2012 Texas Inst...

Page 37: ...d Circuit Board Layouts and Schematics Figure 36 Bottom Layer Signal 37 SLOU338A October 2012 Revised November 2012 AFE5809EVM Evaluation Module Submit Documentation Feedback Copyright 2012 Texas Inst...

Page 38: ...youts and Schematics www ti com 12 1 Schematics Figure 37 Schematic Sheet 1 of 10 38 AFE5809EVM Evaluation Module SLOU338A October 2012 Revised November 2012 Submit Documentation Feedback Copyright 20...

Page 39: ...Printed Circuit Board Layouts and Schematics Figure 38 Schematic Sheet 2 of 10 39 SLOU338A October 2012 Revised November 2012 AFE5809EVM Evaluation Module Submit Documentation Feedback Copyright 2012...

Page 40: ...Circuit Board Layouts and Schematics www ti com Figure 39 Schematic Sheet 3 of 10 40 AFE5809EVM Evaluation Module SLOU338A October 2012 Revised November 2012 Submit Documentation Feedback Copyright 20...

Page 41: ...rinted Circuit Board Layouts and Schematics Figure 40 Schematic Sheet 4 of 10 41 SLOU338A October 2012 Revised November 2012 AFE5809EVM Evaluation Module Submit Documentation Feedback Copyright 2012 T...

Page 42: ...t Board Layouts and Schematics www ti com Figure 41 Schematic Sheet 5 of 10 42 AFE5809EVM Evaluation Module SLOU338A October 2012 Revised November 2012 Submit Documentation Feedback Copyright 2012 Tex...

Page 43: ...rinted Circuit Board Layouts and Schematics Figure 42 Schematic Sheet 6 of 10 43 SLOU338A October 2012 Revised November 2012 AFE5809EVM Evaluation Module Submit Documentation Feedback Copyright 2012 T...

Page 44: ...Printed Circuit Board Layouts and Schematics www ti com Figure 43 Schematic Sheet 7 of 10 44 AFE5809EVM Evaluation Module SLOU338A October 2012 Revised November 2012 Submit Documentation Feedback Copy...

Page 45: ...rinted Circuit Board Layouts and Schematics Figure 44 Schematic Sheet 8 of 10 45 SLOU338A October 2012 Revised November 2012 AFE5809EVM Evaluation Module Submit Documentation Feedback Copyright 2012 T...

Page 46: ...The circuits are only coupled through the opto isolators EVM Printed Circuit Board Layouts and Schematics www ti com Figure 45 Schematic Sheet 9 of 10 46 AFE5809EVM Evaluation Module SLOU338A October...

Page 47: ...populating Op Amps for maximum flexibility CW I V Amp www ti com EVM Printed Circuit Board Layouts and Schematics Figure 46 Schematic Sheet 10 of 10 47 SLOU338A October 2012 Revised November 2012 AFE5...

Page 48: ...5R 5 4 KEMET C0402C152J5GACTU C73 C89 CAP SMT 0402 CAPACITOR SMT 0402 C ERAMIC 1500pF 50V 5 C0G NP0 6 8 TDK C1005X5R0J105M C77 C79 C81 C83 C85 C87 C104 CAP SMT 0402 CAPACITOR SMT 0402 C C126 ER 1 0uF...

Page 49: ...1 C35 C36 C47 C48 CAP SMT 1206 CAPACITOR SMT 1206 C ERAMIC 22uF 10V 10 X 5R 22 1 AVX 1210ZG226ZAT2A C169 CAP SMT 1210 CAP 22uF 10V 80 20 23 4 VISHAY SPRAGE 293D226X9016D2T C43 CAP SMT 7343 CAP TAN SMT...

Page 50: ...ICS 4 103239 0x3 JP3 JP6 JP15 JP52 JP53 JP56 JP57 HEADER THU JUMPE MAKE FROM 4 103239 0 JP59 P15 P16 P17 R 38 3 NATIONAL SEMI LME49990MA NOPB U3 U5 U7 IC SMT 8P ULTRA LOW DISTORTION ULTRA LOW NOISE OP...

Page 51: ...85C 5nS 40 000 MHz 53 7 VENKEL CR0402 16W 000T R2 R5 R14 R63 R71 R93 RES SMT 0402 RESISTOR SMT 0402 0 OHM 1 16W ZERO JUMPER 54 2 VISHAY CRCW04021001F100 R50 R92 RES SMT 0402 RESISTOR SMT 0402 1K 1 16W...

Page 52: ...8 R39 R46 R47 R48 R49 RES SMT 0603 RESISTOR SMT 0603 THI N FILM 499 OHM 0 1 1 10W 25ppm 73 3 VISHAY TNPW060349R9BEEN R9 R36 R37 RES SMT 0603 RESISTOR SMT 0603 THI N FILM 49 9 OHM 0 1 1 10W 74 1 KYCON...

Page 53: ...OW NOISE DIFFERENTIAL I O AMPLIFIERS UNINSTALLED 89 6 UNINSTALLED 0402YC104KAT2A UN C27 C28 C42 C44 C100 C102 C13 UNINSTALLED UNINSTALLED C14 90 11 UNINSTALLED CRCW04020000Z0ED UN R1 R6 R7 R8 R11 R15...

Page 54: ...PCB THICK Use J630 ND for board thickness of 042 or J502 ND for 062 or J992 ND for 068 100 1 CONNOR WINFIELD CWX813 10 0M X1 OSC SMT 4P OSCILLATOR SMT 4P 3 3 V 25ppm 20 70C 10 000 MHz Use FVXO PC73B 6...

Page 55: ...ncy energy and has not been tested for compliance with the limits of computing devices pursuant to part 15 of FCC or ICES 003 rules which are designed to provide reasonable protection against radio fr...

Page 56: ...na type and its gain should be so chosen that the equivalent isotropically radiated power e i r p is not more than that necessary for successful communication This radio transmitter has been approved...

Page 57: ...roduct only after you obtained the license of Test Radio Station as provided in Radio Law of Japan with respect to this product or 3 Use of this product only after you obtained the Technical Regulatio...

Page 58: ...property damage personal injury or death If there are questions concerning these ratings please contact a TI field representative prior to connecting interface electronics including input power and in...

Page 59: ...ing the warranty period to the address designated by TI and that are determined by TI not to conform to such warranty If TI elects to repair or replace such EVM TI shall have a reasonable time to repa...

Page 60: ...transmitter has been approved by Industry Canada to operate with the antenna types listed in the user guide with the maximum permissible gain and required antenna impedance for each antenna type indic...

Page 61: ...ified allowable ranges some circuit components may have elevated case temperatures These components include but are not limited to linear regulators switching transistors pass transistors current sens...

Page 62: ...REMOVAL OR REINSTALLATION ANCILLARY COSTS TO THE PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES RETESTING OUTSIDE COMPUTER TIME LABOR COSTS LOSS OF GOODWILL LOSS OF PROFITS LOSS OF SAVINGS LOSS OF USE L...

Page 63: ...sponsible for compliance with all legal regulatory and safety related requirements concerning its products and any use of TI components in its applications notwithstanding any applications related inf...

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