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ADS9120EVM-PDK Operation
16
SBAU262 – August 2016
Copyright © 2016, Texas Instruments Incorporated
ADS9120EVM-PDK
The user can select SCLK Frequency and Sampling Rate on this pane and is dependent of the Protocol
selected. The GUI allows the user to enter the targeted values for these two parameters and the GUI
computes the best values that can be achieved, considering the timing constraints of the selected Device
Protocol.
The user can specify a target SCLK frequency (in Hz) and the GUI tries to match this frequency as closely
as possible by changing the PHI PLL settings and the achievable frequency that can differ from the target
value displayed. Similarly, the sampling rate of the ADC can be adjusted by modifying the Target
Sampling Rate argument (also in Hz). The achievable ADC sampling rate can differ from the target value,
depending on the applied SCLK frequency and selected Device Mode and the closest match achievable is
displayed. This pane therefore allows the user to try various settings available on the ADS9120 in an
iterative fashion until the user converges to the best settings for the corresponding test scenario.
The final option in this pane is the selection for the Update Mode. The default value is
Immediate
,
indicating that the interface settings selection made by the user is applied to configure both the host and
the ADS9120 instantly.
Manual
indicates that the selection made is made only when the user finalizes
their choices and is ready to configure the device.
The Device Reset button functions as a Master RESET to both the ADS9120EVM and the GUI. When the
button is pressed, the ADC RESETs to the RESET configuration explained in the datasheet (
The GUI also updates the Interface Configuration settings and the Register Map to reflect the device
RESET state.