Texas Instruments ADS8861EVM-PDK, User Manual, Page: 8 / 21

SDI
SCLK
SDO
CONVST
JP2
1
2
3
JP3
(CLOSED)
DVDD
20k
/CS
CONVST
J2:1 or J2:7
J2:17
ADS8861
/CS
CONVST
SDI
SCLK
SDO
CONVST
JP2
2
3
JP3
(OPEN)
DVDD
20k
/CS
/CS
J2:1 or J2:7
J2:17
ADS8861
EVM Digital Configuration
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5 EVM Digital Configuration
The EVM offers two jumpers (JP2 and JP3) to configure the EVM in either 3-wire or 4-wire SPI mode. By
default, the EVM jumper settings are 3-wire. JP1 only establishes the pin that carries the chip-select signal
from the J2 header.
5.1 SPI 3-Wire Mode (JP2:2–3 and JP3:OPEN)
The chip-select signal is used to bring the ADS8861 digital output out of 3-state and initialize conversions.
The rising edge of the chip-select signal starts a conversion, then after the conversion time the falling
edge of chip-select brings the digital output out of 3-state.
Figure 4 shows this configuration.
Figure 4. Serial 3-Wire Configuration
5.2 SPI 4-Wire Mode (JP2:1–2 and JP3:CLOSED)
The chip-select signal is used to bring the ADS8861 digital output out of 3-state. However, conversion is
initialized from J3:17 as an independent signal. The rising edge of J3:17 (CONVST) starts a conversion,
then after the conversion time the falling edge of the chip-select brings the digital output out of 3-state.
Figure 5 shows this configuration.
Figure 5. Serial 4-Wire Configuration
8 ADS8861EVM-PDK SBAU214 – October 2013
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