Texas Instruments ADS8861EVM-PDK, User Manual, Page: 6 / 21

EVM Digital Interface
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3 EVM Digital Interface
Samtec part numbers SSW-110-22-F-D-VS-K and TSM-110-01-L-DV-P provide convenient 10-pin, dual-
row, header and socket combinations at P1. The header and socket provides access to the ADC digital
control pins. Consult Samtec at
www.samtec.com or call 1-800-SAMTEC-9 for a variety of mating
connector options.
Table 3 summarizes the pinouts for the digital interface J2.
Table 3. J2: Serial Interface Header
Pin Number Signal Description
J2.1 CS or CONVST Chip-select input that can be used as a convert start
J2.3 SCLK Serial clock input
Chip-select input that can be used as a convert start intended for
J2.7 CS or CONVST
the MMB0 motherboard
J2:13 SDO or MISO SDO or MISO output
20-k Ω pull-up resistor for detecting falling edges at the end of
J2.15 INT
conversions
J2.17 CONVST Directly connects to the convert start pin if JP3 is installed
J2.4, J2.10, and J2.18 GND Digital ground connections
I
2
C bus; used only used to program the U4 EEPROM on the
J2.16, J2.20 I
2
C™ bus
EVM board
J2.2, J2.5-6, J2.8-9, J2.11-12,
Unused Unused
J2.14, and J2:19
3.1 Serial Interface (SPI)
The ADS8861 ADC uses SPI serial communication in mode 1 (CPOL = 0, CPHA = 1) with high-speed
clocks greater than 30 MHz or uses mode 0 (CPOL = 0, CPHA = 0) for slower clocks. Because the serial
clock (SCLK) frequency can be as fast as 80 MHz, the ADS8861EVM offers 47-
Ω resistors between the
SPI signals and J2 to aid with signal integrity. Typically, in high-speed SPI communication, fast signal
edges can cause overshoot; these 47-
Ω resistors slow down the signal edges in order to minimize signal
overshoot.
3.2 I
2
C Bus for Onboard EEPROM
The ADS8861EVM has an I
2
C bus that records the board name and assembly date to communicate with
the onboard EEPROM. This bus is not used in any form by the ADS8861 converter.
6 ADS8861EVM-PDK SBAU214 – October 2013
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