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EVM WARNINGS AND RESTRICTIONS

It is important to operate this EVM within the input voltage range of

±

6 V and the output

voltage range of 0 V and 5.5 V.

Exceeding the specified input range may cause unexpected operation and/or irreversible
damage to the EVM. If there are questions concerning the input range, please contact a TI
field representative prior to connecting the input power.

Applying loads outside of the specified output range may result in unintended operation and/or
possible permanent damage to the EVM. Please consult the EVM User’s Guide prior to
connecting any load to the EVM output. If there is uncertainty as to the load specification,
please contact a TI field representative.

During normal operation, some circuit components may have case temperatures greater than
60

°

C. The EVM is designed to operate properly with certain components above 60

°

C as long

as the input and output ranges are maintained. These components include but are not limited
to linear regulators, switching transistors, pass transistors, and current sense resistors. These
types of devices can be identified using the EVM schematic located in the EVM User’s Guide.
When placing measurement probes near these devices during operation, please be aware
that these devices may be very warm to the touch.

Mailing Address:

Texas Instruments
Post Office Box 655303
Dallas, Texas 75265

Copyright 

 2004, Texas Instruments Incorporated

Summary of Contents for ADS8381EVM

Page 1: ...ADS8381EVM May 2004 Data Acquistion User s Guide SLAU133...

Page 2: ...itute a license from TI to use such products or services or a warranty or endorsement thereof Use of such information may require a license from a third party under the patents or other intellectual p...

Page 3: ...handling or use of the goods Please be aware that the products received may not be regulatory compliant or agency certified FCC UL CE etc Due to the open construction of the product it is the user s r...

Page 4: ...there is uncertainty as to the load specification please contact a TI field representative During normal operation some circuit components may have case temperatures greater than 60 C The EVM is desi...

Page 5: ...Chapter 3 Digital Interface Chapter 4 Power Supply Requirements Chapter 5 Using the EVM Chapter 6 ADS8381EVM BOM Layout and Schematic Related Documentation From Texas Instruments To obtain a copy of a...

Page 6: ...t J of part 15 of FCC rules which are designed to provide reasonable protection against radio frequency interference Operation of this equipment in other en vironments may cause interference with radi...

Page 7: ...erence 2 3 3 Digital Interface 3 1 4 Power Supply Requirements 4 1 5 Using the EVM 5 1 5 1 As a Reference Board 5 2 5 2 As a Prototype Board 5 2 5 3 As a Software Test Platform 5 2 6 ADS8381EVM BOM La...

Page 8: ...er Layer 4 6 6 Tables 2 1 Analog Input Connector 2 1 2 2 Solder Short Jumper Setting 2 3 3 1 Pinout for Parallel Control Connector P2 3 1 3 2 Jumper Settings 3 2 3 3 Data Bus Connector P3 3 2 3 4 Pino...

Page 9: ...1 1 EVM Overview EVM Overview This chapter contains the features of the ADS8381EVM Topic Page 1 1 Features 1 1 Chapter 1...

Page 10: ...aluation board for the high speed ADS8381 18 bit single channel parallel interface SAR type analog to digital converters Onboard signal conditioning Onboard reference Input and output digital buffer O...

Page 11: ...the center pin of SMA connector J2 Table 2 1 Analog Input Connector Description Signal Name Connector Pin Signal Name Description Pin tied to Ground AGND P1 1 P1 2 Noninverting Input Channel Reserved...

Page 12: ...elected such that ADS8381EVM meets the 100 kHz AC performance specifications listed in the data sheet The series resistor works with the capacitor to filter the input signal but also isolates the ampl...

Page 13: ...via P1 pin 20 See Table 2 2 for jumper settings See Chapter 6 for the full schematic Table 2 2 Solder Short Jumper Setting Reference Jumper Setting Reference Designator Description 1 2 2 3 SJP1 Select...

Page 14: ...2 4...

Page 15: ...A1 Address line from processor P2 11 A2 Address line from processor P2 13 P2 15 P2 17 P2 19 INTc Set jumper W3 to select BUSY or inverted signal to be applied to this pin Note All even numbered pins o...

Page 16: ...ered Data Bit 6 P3 15 D7 Buffered Data Bit 7 P3 17 D8 Buffered Data Bit 8 P3 19 D9 Buffered Data Bit 9 P3 21 D10 Buffered Data Bit 10 P3 23 D11 Buffered Data Bit 11 P3 25 D12 Buffered Data Bit 12 P3 2...

Page 17: ...l Description TP16 BVDD Apply 3 3 V or 5 0 V See ADC data sheet for full range TP20 AVCC Apply 5 0 V TP14 VA Apply 6 0 V Positive supply for amplifier TP18 VA Apply 6 0 V Negative supply for amplifier...

Page 18: ...4 2...

Page 19: ...The ADS8381EVM serves three functions 1 As a reference design 2 As a prototype board and 3 As software test platform Topic Page 5 1 As a Reference Board 5 2 5 2 As a Prototype Board 5 2 5 3 As a Softw...

Page 20: ...shorts the minus supply pin of the amplifier to ground Positive supply voltage can be applied via test point TP14 or connector J1 pin 1 5 3 As a Software Test Platform As a software test platform con...

Page 21: ...ic ADS8381EVM BOM Layout and Schematic This chapter contains the ADS8381EVM bill of materials the layouts and the schematic Topic Page 6 1 ADS8381EVM Bill of Materials 6 2 6 2 ADS8381EVM Layout 6 5 6...

Page 22: ...805 Not installed Not installed R2 1 NI 805 Not installed Not installed R6 R10 2 1k 805 Panasonic ECG or Alternate ERJ 6ENF1001V 1 00 k 1 10W 1 0805 SMD R16 R17 R18 R19 R20 5 10k 603 Panasonic ECG or...

Page 23: ...V 10 SMT C17 1 47 F 1206 TDK Corporation or Alternate C3216X5R0J476M Capacitor CER 47 F 6 3 V X5R 20 1206 C13 C18 C45 C60 C61 5 NI 603 Not installed Not installed C30 C35 R5 3 NI 805 Not installed No...

Page 24: ...01 Right Angle SMA Connector J4 1 6X2X 1 6X2X 1_SMT _plug_ _soc Samtec SSW 106 22 S D VS 0 025 SMT Socket bottom side of PWB ket Samtec TSM 106 01 T D V P 0 025 SMT PLUG top side of PWB P3 1 18X2X 1_...

Page 25: ...ADS8381EVM Layout 6 5 ADS8381EVM BOM Layout and Schematic 6 2 ADS8381EVM Layout Figure 6 1 Top Layer Layer 1 Figure 6 2 Ground Plane Layer 2...

Page 26: ...ADS8381EVM Layout 6 6 Figure 6 3 Power Plane Layer 3 Figure 6 4 Bottom Layer Layer 4...

Page 27: ...ADS8381EVM Schematic 6 7 ADS8381EVM BOM Layout and Schematic 6 3 ADS8381EVM Schematic The schematic follows this page...

Page 28: ...13 14 15 16 17 18 19 20 P1 1 1 2 2 3 3 4 4 5 5 6 6 7 7 8 8 9 9 10 10 11 11 12 12 13 13 14 14 15 15 16 16 17 17 18 18 19 19 20 20 21 21 22 22 23 23 24 24 25 25 26 26 27 27 28 28 29 29 30 30 31 31 32 3...

Page 29: ...8 Footprint 5VCC C18 NI C45 NI C17 47uF EXT_REF R14 100 VCC C16 1uF C36 0 1uF VCC IN 1 OUT 2 GND 3 U3 REF3040 5VCC DB 17 0 TP4 3 1 2 SJP1 3 1 2 SJP2 1 2 SJP3 R15 100 C49 10uF IN 1 OUT 2 GND 3 U10 NI C...

Page 30: ...DIR A1 A2 A3 A4 A5 A6 A7 A8 B1 B2 B3 B4 B5 B6 B7 B8 VCC GND U8 SN74AHC245PWR C59 0 1uF B_RD DB 17 0 DB17 DB16 DB15 DB14 DB13 DB12 DB11 DB10 DB9 DB8 DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 B_DB17 B_DB16 B_DB1...

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