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ADS5120EVM
4
SBAU078
www.ti.com
ADC Outputs
The data outputs from the ADC are buffered using four
SN74AVC16827 buffers before going to headers J10, J11,
J12, and J13. The ADC and output buffer can p1.8V
or +3.3V output levels. This is selected by the voltage placed
at the ADC driver supply (banana jacks J21 and J22). The
standard headers are on a 100-mil grid, which allows for
easy connection to a logic analyzer.
PHYSICAL DESCRIPTION
This section describes the physical characteristics and PCB
layout of the EVM and lists the components used on the
module.
PCB LAYOUT
The EVM is constructed on a 8-layer, 5.45" x 6.30", 0.062-
inch thick PCB using FR-4 material. A brief description of the
individual layers is shown below. The layer drawings are
attached to the end of this document (Figures 6 - 13).
PARTS LIST
Table VI lists the parts used in constructing the EVM.
Summary of Contents for ADS5120EVM
Page 11: ...ADS5120EVM SBAU078 11 www ti com FIGURE 6 EVM Layer 1 Top Layer with Silk Screen...
Page 12: ...ADS5120EVM 12 SBAU078 www ti com FIGURE 7 EVM Layer 2 Ground Plane I...
Page 13: ...ADS5120EVM SBAU078 13 www ti com FIGURE 8 EVM Layer 3 Inner Layer I...
Page 14: ...ADS5120EVM 14 SBAU078 www ti com FIGURE 9 EVM Layer 4 Split Power Plane I...
Page 15: ...ADS5120EVM SBAU078 15 www ti com FIGURE 10 EVM Layer 5 Inner Layer II...
Page 16: ...ADS5120EVM 16 SBAU078 www ti com FIGURE 11 EVM Layer 6 Split Power Plane II...
Page 17: ...ADS5120EVM SBAU078 17 www ti com FIGURE 12 EVM Layer 7 Ground Plane II...
Page 18: ...ADS5120EVM 18 SBAU078 www ti com FIGURE 13 EVM Layer 8 Bottom Layer with Silk Screen...