Texas Instruments ADS1298RECG-FE, User Manual

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a) Pull-Up/Pull-Down Resistors b) Current Source
PGA
10M
W
10M W
AVDD
INP
INN
PGA
AVDD
INP
INN
ADS129x ADS129x
22 F
m
To ADC Reference Inputs
VCAP1
10 F m
VREFP
VREFN
Bandgap
2.4V or 4V
AVSS
R1
(1)
R3
(1)
R2
(1)
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Using the ADS1298RECG-FE Software
17 SBAU181B – March 2011 – Revised Janurary 2016
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ADS1298R
3.4.2 Channel Registers Tab (ADC Register)
The Channel Register tab provides access to control registers that control different properties/settings for
the ADC channels. The control register are grouped into two groups: Global Channel Registers and
Channel Control Registers.
3.4.2.1 Global Channel Registers
The Global Channel Registers box includes Configuration Register 1 (CONFIG1), Configuration Register 2
(CONFIG2), Configuration Register 3 (CONFIG3), and Lead Off Control Register (LOFF). The upper half
of
Figure 8 shows the section of the UI panel that allows manipulation and control of these registers.
Configuration Register 1 enables the user to control the resolution mode, enable the daisy-chain
configuration options, and program the data rate.
Configuration Register 2 enables the user to select an internal square wave test source amplitude of
±1mV or ±2mV and a frequency of DC, 2Hz (f
CLK
/2
21
), or 4Hz (f
CLK
/2
20
).
Configuration Register 3 controls the bandgap reference (illustrated in Figure 9 ) and right leg drive
(RLD) options. This register enables the user to select between an external or internal reference voltage,
enable/disable the internal reference buffer, toggle between a 2.4V or a 4.0V output voltage, and to
enable/disable the RLD as well as choose whether the RLD voltage is provided internally or externally.
Figure 9. Internal Reference and Buffer Connections
The Lead-Off Control Register allows the user to configure the threshold for the lead-off comparator,
resistive pull-up or current-source excitation, the lead-off current magnitude, and DC or AC detection.
Figure 10 illustrates a simplified diagram of the resistive pull-up and excitation options for the lead-off
detect feature.
Figure 10. Lead-Off Excitation Options