Power Dissipation
2-4
2.3
Power Dissipation
The low junction-to-case thermal resistance of the PWP package, along with
a good board layout, allows the TPS54x72EVM−222 EVMs to output full rated
load current while maintaining safe junction temperatures. With a 3.3-V input
source and a 6-A load, the junction temperture is approximately 60
°
C, while
the case temperature is approximately 55
°
C. The total circuit losses at 25
°
C
are shown in Figure 2−3. The input voltage for the TPS54972 is 3.3 V and for
the TPS54672 and TPS54872, 5.0 V. Note that for a given output current the
TPS54972 dissipates less power due to the lower drain-to-source on
resistance of the MOSFETs. For additional information on the dissipation
ratings of the devices, see the individual product data sheets.
Figure 2−3. Power Dissipation
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
0
1
2
3
4
5
6
7
8
9
10
TPS54872
TPS54672
TPS54972
POWER DISSIPATION
vs
OUTPUT CURRENT
IO − Output Current − A
− Power Dissipation − W
P
D
Summary of Contents for 296-20597-ND
Page 1: ... November 2002 PMP EVMs User s Guide SLVU076 ...
Page 15: ...1 6 ...
Page 36: ...Layout 3 3 Board Layout Figure 3 2 Internal Layer 1 Layout Figure 3 3 Internal Layer 2 Layout ...
Page 37: ...Layout 3 4 Figure 3 4 Bottom Side Layout Looking From Top Side Figure 3 5 Top Side Assembly ...
Page 38: ...Layout 3 5 Board Layout Figure 3 6 Bottom Side Assembly Showing Optional Components ...
Page 39: ...3 6 ...