4 IP Addressing
I/O Addressing
4.1
The Z85230 Serial Communication Controller (SCC) registers are accessed by a set of registers in the
TIP867 IP I/O space.
Each Z85230 SCC channel register is accessed by two addresses in the IP’s I/O address space. The
Z85230 SCC uses an internal set of registers for each channel, which are accessed indirectly.
Offset
Symbol
Description
Size (Bit)
0x01
CHCON0
Port 0 Control Register (SCC1 B Control)
8
0x03
CHDAT0
Port 0 Data Register (SCC1 B Data)
8
0x05
CHCON1
Port 1 Control Register (SCC1 A Control)
8
0x07
CHDAT1
Port 1 Data Register (SCC1 A Data)
8
0x09
CHCON2
Port 2 Control Register (SCC2 B Control)
8
0x0B
CHDAT2
Port 2 Data Register (SCC2 B Data)
8
0x0D
CHCON3
Port 3 Control Register (SCC2 A Control)
8
0x0F
CHDAT3
Port 3 Data Register (SCC2 A Data)
8
0x11
CHCON4
Port 4 Control Register (SCC3 B Control)
8
0x13
CHDAT4
Port 4 Data Register (SCC3 B Data)
8
0x15
CHCON5
Port 5 Control Register (SCC3 A Control)
8
0x17
CHDAT5
Port 5 Data Register (SCC3 A Data)
8
0x19
CHCON6
Port 6 Control Register (SCC4 B Control)
8
0x1B
CHDAT6
Port 6 Data Register (SCC4 B Data)
8
0x1D
CHCON7
Port 7 Control Register (SCC4 A Control)
8
0x1F
CHDAT7
Port 7 Data Register (SCC4 A Data)
8
Table 4-1 : Register Set
The write only Port x Control Register is the WR0 register of the addressed SCC.
TIP867 User Manual Issue 1.0.5
Page 9 of 12
