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5.2. Channel 1 Status Register Address $03
The STATUS_RDC1 Register is a byte wide read register and indicates the data conversion status of the conver-
ter channel 1.
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BIT
LOS
Figure 6: STATUS_RDC1 Channel 1 Status Register
5.2.1. BUILT-IN-TEST
Bit 0 Built-In-Test (BIT) indicates an error. If the difference between input and output angels exceeds approxima-
tely 55 LSBs (of the selected resolution) the BIT bit is read as ’1’. This condition will occur during a large step
and reset after the converter settles out.
If the Build-In-Test bit of the Status Register is read as ’1’ the resolution changed from it’s programmed value
one step down to a lower resolution. This allows the converter to settle out faster.
This bit will change to ’1’ for an overvelocity condition, because the converter loop cannot maintain input-output
or/ and if the converter malfunctions where it cannot maintain the loop at a null.
Bit 0 will also read as ’1’ if both, sin and cos input voltages are less than 800mV peak or if the differential reference
voltages is less than 20mV peak.
5.2.2. LOSS-OF-SIGNAL
This status bit only exists for TIP150 modules with Signal Conditioning Adapters witch have a reference oscillator
on board ( TIP150-A2-xx or TIP150-A4-xx ). For all other Signal Conditioning Adapters this bit always read as
’0’.
Reading Bit 1 Loss-of-Signal (LOS) as ’1’ indicates that both sin and cos input of the on board reference oscillator
are less than 800mV peak.
Summary of Contents for TIP150
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