Teridian 78Q2120C09 User Manual Download Page 2

 

78Q2120C09

10/100BASE-TX Transceiver

MII Evaluation Board Design Kit 

UM 78Q2120C09 v1-2 

User Manual

April 2007 

© 2007 Teridian Semiconductor Corporation, Proprietary and Confidential 

- 2 -

 

Rev_1.2

 

 

 

MII ADAPTOR WITH 78Q2120C09 

Switch Positions 
The OFF switch position sets a logic level = “1” and conversely, the ON position sets a logic level = “0”. 
Some DIP switch markings are different. 
 

ON equals CLOSED. 

 OFF 

equals 

OPEN. 

 
For normal operation switch SW2 should be set as follows: 
 ISO 

 ON 

 ISODEF ON 
 TEST 

 ON 

 

PAD4:0  

PHY Address = 0, the 78Q2120C09 responds to all accesses 

 

 

 

PHY Address = non-zero, the 78Q2120C09 responds only to its unique address 

 
For normal operation the following SW1 switches should be set as follows: 
 N/U 

 OFF 

(not 

used) 

 PCSBP 

 ON 

 

 PWRDN ON 
 
Switch SW1 positions ANEGA and TECH0:2 set the line interface technology capabilities. 
Refer to the data sheet for a complete description. 
For full Auto-Negotiation capabilities, set ANEGA and TECH0:2 to OFF. 
 
Use With the Netcom Smart-Bits 
The Netcom expects to be the master and defaults to 100BASE-TX Half-Duplex operation.  To allow Fast-Ether 
Windows to reconfigure the 78Q2120C09’s control register MR0 bits, set ANEGA and TECH0:2 all to OFF.  If the 
78Q2120C09’s technology pins are set to anything else, the 78Q2120C09 will disable some modes and prevent 
the Netcom from reconfiguring the 78Q2120C09 and data errors may be observed. 
 
After initialization the 78Q2120C09 defaults to 100BASE-TX Full-Duplex operation.  When connected to another 
fully capable transceiver, the transceivers will be in full-duplex mode.  The default configuration of the Netcom is 
100BASE-TX Half-Duplex operation.  If data transfers were to commence, the Netcom would display Collision 
errors (because it does not automatically read the transceivers and reconfigure). 
 
If a transceiver is used which defaults to 100BASE-TX Half-Duplex operation, the 78Q2120C09 will adjust itself 
for half-duplex operation (assuming the 78Q2120C09 is setup for the proper technologies). 
 
To establish proper operation between the 78Q2120C09 and the Netcom, click on the “Options” button followed 
by selecting “Full Duplex MII”.  Repeat selecting “Full Duplex MII” twice to ensure that everything is configured 
identically. 
 
The 78Q2120C09 can be configured for half-duplex operation (ANEGA = ON and TECH0:2 = ON, OFF, ON) to 
minimize incompatibilities with other transceivers and the Netcom. 

 

 

 

Summary of Contents for 78Q2120C09

Page 1: ...rporates a sophisticated combination of real time adaptive equalization an adaptive DC offset adjustment circuit and baseline wander correction Smart squelch circuitry further improves the receiver s...

Page 2: ...ndows to reconfigure the 78Q2120C09 s control register MR0 bits set ANEGA and TECH0 2 all to OFF If the 78Q2120C09 s technology pins are set to anything else the 78Q2120C09 will disable some modes and...

Page 3: ...0 40 H max 1 Mhz min Inter Winding Capacitance 25 pF max D C Resistance 0 9 ohm max Insertion Loss 1 1 dB typ 0 100 Mhz HIPOT 1500 Vrms Note 1 The receive line transformer s Open Circuit Inductance ca...

Page 4: ...G Y Yes Yes b J0011D21E Down Yes G G Yes No b J0011D21ENL Down Yes G G Yes Yes b J0011D01 Down No N A Yes No a J0011D01NL Down No N A Yes Yes a J0011D01B Down Yes G Y Yes No b J0011D01BNL Down Yes G Y...

Page 5: ...5104T Down Yes G Y Yes No b MIC24018 5101T LF3 Down Yes R G Yes Yes b MIC24019 0101T Down Yes G R Yes No b MIC24111 0101T Up Yes Y G Yes No A MIC24111 0101T LF3 Up Yes Y G Yes Yes A MIC24412 0128T LF3...

Page 6: ...ast Ethernet Analyzer The Teridian Semiconductor 78Q2120C09 MII Adapter and Lancast Fast Ethernet Adapter were attached to the Netcom s Ports A B respectively Twisted pair Category 5 General Cable P N...

Page 7: ...ditional component and solder side ground layers may be added for maximum EMC containment 15 The GND plane should extend out to the transceiver side of the transformer Remove the VCC and GND planes fr...

Page 8: ...52 51 56 54 62 61 41 60 55 18 33 23 17 34 9 8 26 25 7 47 44 45 46 49 48 50 57 40 39 38 37 36 12 13 14 15 16 5 3 35 42 2 1 TXEN TXCLK TXD3 TXD2 TXD1 TXD0 RXCLK RXD3 RXD2 RXD1 RXD0 PCSBP VCC CKIN RST XT...

Page 9: ...LK R35 75 0603 C17 0 1 0603 T1 TLA 6T118LF TDK SMT16 6 8 7 4 10 9 11 5 15 16 14 12 13 2 3 1 RD RD RDCT NC1 RXCT RX RX NC2 TXCT TX TX NC3 NC4 TDCT TD TD TXD0 TXD3 C14 0 01 0603 RXD3 LLED GND 68 ohm Imp...

Page 10: ...A LUMEX 6 R35 R36 R37 R38 R39 R40 RES 75 CC0603 7 R5 R6 R7 R8 R9 R11 R13 RES 100 CC0603 7 R42 R43 R44 R45 R46 R47 R48 RES 680 CC0603 2 R24 R41 RES 5 1K CC0603 18 R15 R16 R18 R19 R20 R21 R22 R23 R24 R...

Page 11: ...78Q2120C09 MII Evaluation Board Design Kit User Manual 2007 Teridian Semiconductor Corporation Proprietary and Confidential 11 Rev_1 2 Top Silkscreen...

Page 12: ...78Q2120C09 MII Evaluation Board Design Kit User Manual 2007 Teridian Semiconductor Corporation Proprietary and Confidential 12 Rev_1 2 Top Layer...

Page 13: ...78Q2120C09 MII Evaluation Board Design Kit User Manual 2007 Teridian Semiconductor Corporation Proprietary and Confidential 13 Rev_1 2 VCC Layer...

Page 14: ...78Q2120C09 MII Evaluation Board Design Kit User Manual 2007 Teridian Semiconductor Corporation Proprietary and Confidential 14 Rev_1 2 Ground Layer...

Page 15: ...78Q2120C09 MII Evaluation Board Design Kit User Manual 2007 Teridian Semiconductor Corporation Proprietary and Confidential 15 Rev_1 2 Bottom Layer...

Page 16: ...emarks or other rights of third parties resulting from its use No license is granted under any patents patent rights or trademarks of Teridian Semiconductor Corporation and the company reserves the ri...

Page 17: ...Mouser Electronics Authorized Distributor Click to View Pricing Inventory Delivery Lifecycle Information Maxim Integrated 78Q2120C09 DB...

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