Teridian 73S8009C User Manual Download Page 18

73S8009C Demo Board User Manual 

UM_8009C_059

 

 

18 

 

Rev. 1.3 

5.3 

73S8009C Demo Board Bill of Materials 

 

Table 6: 73S8009C Demo Board Bill of Materials 

Qnt  Reference 

Part 

PCB Footprint 

Digikey Part 

Number 

Part Number 

Manufacturer 

1  C1 

10 

µ

805 

PCC2225CT-ND 

ECJ-2FB0J106M 

Panasonic 

2  C2, C3 

0.1 

µ

603 

PCC1762CT-ND  ECJ-1VB1C104K 

Panasonic 

1  C4 

4.7 

µ

603 

PCC2396CT-ND 

ECJ-1VB0J475K 

Panasonic 

2  C9, C12 

27 pF 

603 

PCC270ACVCT-

ND 

ECJ-1VC1H270J 

Panasonic 

1  C11  

0.47 

µ

603 

PCC2275CT-ND 

ECJ-1VB0J475K 

Panasonic 

4  JP2, JP3, 

JP5, JP6 

Header 3 

3pins, 2.54mm pitch  S1011E-36-ND 

PBC36SAAN 

Sullins 

2  JP4, JP7 

Header 2 

2pins, 2.54mm pitch  S1011E-36-ND 

PBC36SAAN 

Sullins 

2  J1, J3 

SSM_110_L_SV 

SSM_110_L_SV 

SSM_110_L_SV 

Samtec 

2  J2, J4 

TSM_110_01_L_SV  TSM_110_01_L_SV 

TSM_110_01_L_SV 

Samtec 

1  J5 

Smart Card Connector  ITT_CCM02-2504 

401-1715-ND 

CCM02-2504LFT 

ITTCannon 

1  J6 

SIM/SAM Connector 

ITT_CCM03-3754  CCM03-3754CT-

ND 

CCM03-3754 

ITTCannon 

1  L1 

Inductor 

 

445-1998-1-ND 

SLF7032T-

100M1R4-2-PF 

TDK 

2  R7 

603 

P0.0GCT-ND 

ERJ-3GEY0R00V 

Panasonic 

1  S1 

Switch 

Panasonic EVQ 

P8051SCT 

EVQ-PJX05M 

Panasonic 

8  TP1, TP2, 

TP3, TP4, 
TP5, TP6, 
TP7, TP8 

TP 

2X1_Header 

S1011E-36-ND 

PBC36SAAN 

Sullins 

1  U1 

73S8009C 

32QFN 

73S8009C 

Teridian 

 
Note: The resistors noted Ru and Rd in the schematic are not populated on the board.  They can be 
implemented to adjust the features of the smart card reader. 
 

6  Errata 

The 73S8009C Demo Board contains a silk screen error on JP6.  The VDD and GND are reversed and 
have corrective decals attached to show the proper labeling.  
 

Summary of Contents for 73S8009C

Page 1: ...Simplifying System IntegrationTM 73S8009C Demo Board User Manual February 10 2010 Rev 1 3 UM_8009C_059...

Page 2: ...the Company s warranty detailed in the Teridian Semiconductor Corporation standard Terms and Conditions The company assumes no responsibility for any errors which may appear in this document reserves...

Page 3: ...t Points 9 4 Design Considerations 12 4 1 General Layout Rules 12 4 2 Optimization for Compliance with EMV 12 4 3 Power Supply Input Configurations 12 4 3 1 USB Power 12 4 3 2 Single Supply Power 12 4...

Page 4: ...ew 15 Figure 7 73S8009C Demo Board Top Signal Layer 16 Figure 8 73S8009C Demo Board Middle Layer 1 Ground Plane 16 Figure 9 73S8009C Demo Board Middle Layer 2 Supply Plane 17 Figure 10 73S8009C Demo B...

Page 5: ...e used in conjunction with the 73S12xxF evaluation platform 1 1 Package Contents Figure 1 73S8009C Demo Board The 73S8009C Demo Board Kit includes A 73S8009C Demo Board Rev 1 The following documents 7...

Page 6: ...oltage card interface 0 3 to VCC 0 3 VDC Pin Voltage LIN pin 0 3 to 6 5 VDC ESD Tolerance Card interface pins 6 kV ESD Tolerance Other pins 2 kV Pin Current 200 mA Operation outside these rating limit...

Page 7: ...ound pin Pin 9 Table 3 J4 Pin Descriptions Pin Pin Name Function 1 CMDVCC Controls the turn on output voltage value and turn off of VCC 2 CMDVCC 3 RSTIN Controls the card reset signal 4 RDY Indicates...

Page 8: ...8 to from the card 5 OFF Interrupt signal to the processor Indicator of card presence and any card fault conditions 6 GND Ground 7 GND Ground 8 GND Ground 9 VPC IN Must be between 2 7 V and 6 5 V 10 V...

Page 9: ...UM_8009C_059 73S8009C Demo Board User Manual Rev 1 3 9 3 Jumpers Switches and Test Points The items marked in Figure 3 are described in Table 5 Figure 3 73S8009C Demo Board Description...

Page 10: ...t VBUS Test point C4 CLK RST VCC I O C8 VBAT Input VBUS Input Two pin test points for each respective smart card signal The pin label name is the respective signal i e VCC CLK and the other pin is GND...

Page 11: ...ee board errata in the appendix for JP6 16 J5 Smart Card Connector Smart card connector When inserting a card credit card size format contacts must face up 17 JP7 CS Disable CS Disable Jumper Insertio...

Page 12: ...the smart connector to ground These capacitors serve as filters for CLK and RST signals in the case of long traces or test equipment perturbations The capacitor on CLK reduces ringing on the trace re...

Page 13: ...hed it can set the OFF_ACK signal high to shut off the 73S8009C If there is no need for the host to perform any shutdown tasks the OFF_ACK pin can be left open and it follows the state of the OFF_REQ...

Page 14: ...C3 OFF_REQ CS C4 4 7uF 1 2 3 JP6 1 2 3 JP5 1 2 TP5 1 2 3 JP3 1 2 TP7 1 2 TP8 1 2 TP4 1 2 TP6 1 2 JP4 3 3V Note JP4 pins 1 and 2 must not be connected with JP2 pins 1 and 2 at the same time GND C8 DNI...

Page 15: ...UM_8009C_059 73S8009C Demo Board User Manual Rev 1 3 15 5 2 73S8009C PCB Layouts Figure 5 73S8009C Demo Board Top View Figure 6 73S8009C Demo Board Bottom View...

Page 16: ...73S8009C Demo Board User Manual UM_8009C_059 16 Rev 1 3 Figure 7 73S8009C Demo Board Top Signal Layer Figure 8 73S8009C Demo Board Middle Layer 1 Ground Plane...

Page 17: ...UM_8009C_059 73S8009C Demo Board User Manual Rev 1 3 17 Figure 9 73S8009C Demo Board Middle Layer 2 Supply Plane Figure 10 73S8009C Demo Board Bottom Signal Layer...

Page 18: ...10_L_SV SSM_110_L_SV X SSM_110_L_SV Samtec 2 J2 J4 TSM_110_01_L_SV TSM_110_01_L_SV X TSM_110_01_L_SV Samtec 1 J5 Smart Card Connector ITT_CCM02 2504 401 1715 ND CCM02 2504LFT ITTCannon 1 J6 SIM SAM Co...

Page 19: ...ation The following 73S8009C documents are available from Teridian Semiconductor Corporation 73S8009C Data Sheet 73S8009C Demo Board User Manual 9 Contact Information For more information about Teridi...

Page 20: ...ected pin number for OFF_ACK in pin description 1 3 2 10 2010 Formatted in the new Teridian style Added Section 1 1 Package Contents Added Section 1 2 Safety and ESD Notes Added Table 3 J4 Pin Descrip...

Page 21: ...Mouser Electronics Authorized Distributor Click to View Pricing Inventory Delivery Lifecycle Information Maxim Integrated 73S8009C DB...

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