TR5-Lite User Manual
48
June 20, 2018
When users press the
Generate
button, the TR5-Lite System Builder will generate the
corresponding Quartus II files and documents as listed in the
the user.
Table 3-1
The files generated by TR5-Lite System Builder
No. Filename
Description
1
<Project name>.v
Top level verilog file for Quartus II
2
si570_controller.v(*)
SI570 External Oscillator controller IP
3
<Project name>.qpf
Quartus II Project File
4
<Project name>.qsf
Quartus II Setting File
5
<Project name>.sdc
Synopsis Design Constraints file for Quartus II
6
<Project name>.htm
Pin Assignment Document
(*) The SI570 Controller includes seven files: si570_controller.v, initial_config.v, clock_divider.v,
edge_detector.v, i2c_reg_controller.v, i2c_controller.v and i2c_bus_controller.v.
Users can use Quartus II software to add custom logic into the project and compile the project to
generate the SRAM Object File (.sof).
For SI570, the Controller will be instantiated in the Quartus II top-level file as listed below:
For CDCM61004, the Controller will be instantiated in the Quartus II top-level file as listed below:
