Apoolo-S10
User Manual
80
www.terasic.com
March 31, 2020
Figure 3-8 Project Settings
Project Generation
When users press the Generate button, the System Builder will generate the
corresponding Quartus Prime files and documents as listed in the
specified by the user.
Table 3-1 Files generated by the System Builder
No.
Filename
Description
1
<Project name>.v
or
<Project name>.vhdl
Top Level Verilog/VHDL File for Quartus Prime
2
si5340_controller (
*
)
Si5340A Clock Generator Controller IP
3
<Project name>.qpf
Quartus Prime Project File
4
<Project name>.qsf
Quartus Prime Setting File
