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Telit Wireless Solutions NL865B1, Manual

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NL865B1 HW Design Guide 

 

1VV0301450 Rev. 1  

Page 

21

 of 

72 

2017-11-20

 

 

 

 

LGA Pads Layout 

 

TOP VIEW 

 

 

 

 

WARNING 

Reserved pins must not be connected. 

 

48

47

46

45

44

43

42

41

40

39

38

37

SLP_IND

RESET*

GND

TX AUX

I2C_SCL

VAUX/PWR

MON

GPIO_01

GPIO_02

GPIO_03

GPIO_04

VBATT

VBATT_PA

1

RFU

GND

36

2

RFU

GND

35

3

RFU

ANT

34

4

RFU

GND

33

5

RFU

GND

32

6

I2C_SDA

RFU

31

7

TXD

RFU

30

8

RXD

(*)

GPIO_05/

SIMIN

29

9

SIMVCC

GPIO_06

28

10

SIMRST

GPIO_07

27

11

SIMCLK

GPIO_08

26

12

SIMIO

RFU

25

ADC_IN1

RFU

RFU

RFU

RFU

RFU

LP_WAKE

RFU

RFU

RFU

GND

RFU

13

14

15

16

17

18

19

20

21

22

23

24

Summary of Contents for NL865B1

Page 1: ...01 2017 Mod 0818 2017 01 Rev 0 NL865B1 HW Design Guide 1VV0301450 Rev 1 2017 11 20...

Page 2: ...r copyrighted material including the exclusive right to copy reproduce in any form distribute and make derivative works of the copyrighted material Accordingly any copyrighted material of Telit and it...

Page 3: ...ies IV Trademarks TELIT and the Stylized T Logo are registered in Trademark Office All other product or service names are the property of their respective owners V Third Party Rights The software may...

Page 4: ...NL865B1 HW Design Guide 1VV0301450 Rev 1 Page 4 of 72 2017 11 20 APPLICABILITY TABLE PRODUCTS NL865B1 E1...

Page 5: ...Text Conventions 9 Related Documents 10 2 GENERAL PRODUCT DESCRIPTION 11 Overview 11 Product Variants and Frequency Bands 12 Target market 12 Main features 13 TX Output Power 14 RX Sensitivity 14 Mech...

Page 6: ...vels 32 Power On 33 Unconditional Restart 35 Power OFF procedure 38 Communication ports 39 5 5 1 Serial Ports 39 5 5 1 1 MODEM SERIAL PORT 1 39 5 5 1 2 MODEM SERIAL PORT 2 41 5 5 1 3 RS232 LEVEL TRANS...

Page 7: ...Recommended footprint for the application 55 PCB pad design 56 PCB pad dimensions 56 Stencil 57 Solder paste 57 NL865B1 Solder reflow 58 9 PACKING SYSTEM 59 Tray 59 Tray Drawing 61 Tape Reel 62 Carrie...

Page 8: ...nd a starting point for properly developing your product with the Telit module Audience This document is intended for Telit customers especially system integrators about to implement their application...

Page 9: ...lure or bodily injury may occur Caution or Warning Alerts the user to important points about integrating the module if these points are not followed the module and end user equipment may fail or malfu...

Page 10: ...V0301450 Rev 1 Page 10 of 72 2017 11 20 Related Documents SIM INTEGRATION DESIGN GUIDE 80000NT10001A NE866B1_NL865B1_AT_Commands_Reference_Guide 80534ST10817A Telit EVB User Guide 1VV0301249 xL865_IFB...

Page 11: ...devices are therefore optimized in cost size and power consumption compared to higher UE categories These advantages make the NL865B1 the perfect platform to enable a quick implementation of LTE techn...

Page 12: ...egion NL865B1 E1 B20 800 B8 900 Europe Refer to Chapter 13 for details information about frequencies and bands Target market The NL865B1 can be used for IoT applications where low power consumption an...

Page 13: ...e 13 of 72 2017 11 20 Main features Function Features Modem NB IoT cellular modem for low BW data communication Real Time Clock Internal IP stack Interfaces Main UART for AT commands Auxiliary UART TX...

Page 14: ...Product Band Sensitivity dBm NL865 B1 E1 B8 B20 113 Mechanical specifications 2 7 1 Dimensions The overall dimensions of NL865 family are Length 24 4 mm Width 24 4 mm Thickness 2 45 mm NOTE A typical...

Page 15: ...ture Range 20 C 55 C The module is fully functional in all the temperature range and it fully meets the 3GPP specifications 40 C 85 C The module is fully functional in all the temperature range Storag...

Page 16: ...ype Comment Asynchronous Serial Port Prog Data 7 TXD I Serial data input from DTE CMOS 1 8V 8 RXD O Serial data output to DTE CMOS 1 8V Asynchronous Auxiliary Serial Port 2 I2C 45 TX_AUX O Auxiliary U...

Page 17: ...MOS 1 8 12 SIMIO I O External SIM Data I O CMOS 1 8 29 SIMIN GPIO_0 5 I SIM Presence input CMOS 1 8 See next chapters ADC 13 ADC_IN1 AI Analog Digital converter input A D Accepted values 0 to 1 8V DC...

Page 18: ...MOS 1 8 26 GPIO08 I O General purpose I O 08 CMOS 1 8 Miscellaneous Functions 47 RESET I Reset Input VBATT Pull up to VBATT 10K 48 SLP_IND O Modem Sleep or PSM Indication CMOS 1 8 Do not Drive this pa...

Page 19: ...ins 1 RESERVED RESERVED 2 RESERVED RESERVED 3 RESERVED RESERVED 4 RESERVED RESERVED 5 RESERVED RESERVED 14 RESERVED RESERVED 15 RESERVED RESERVED 16 RESERVED RESERVED 17 RESERVED RESERVED 18 RESERVED...

Page 20: ...Page 20 of 72 2017 11 20 WARNING Reserved pins must not be connected NOTE The functions marked with are not avalable on early samples and will be supported on future release For more information plea...

Page 21: ...ND RESET GND TX AUX I2C_SCL VAUX PWR MON GPIO_01 GPIO_02 GPIO_03 GPIO_04 VBATT VBATT_PA 1 RFU GND 36 2 RFU GND 35 3 RFU ANT 34 4 RFU GND 33 5 RFU GND 32 6 I2C_SDA RFU 31 7 TXD RFU 30 8 RXD GPIO_05 SIM...

Page 22: ...Voltage 3 8V Nominal Supply Voltage Normal Operating Voltage Range 3 40 V 4 20 V Normal Operating Voltage Range Extended Operating Voltage Range 3 10 V 4 20 V Extended Operating Voltage Range NOTE The...

Page 23: ...3 A C eDRX 10 24 sec AT PSM 1 4 6 A Power Saving Enabled NB IoT Data Call 90mA BW 3 75KHz Single tone data call TX 0dBm 90mA BW 15KHz Single tone data call TX 0dBm 155 mA BW 3 75KHz Single tone data c...

Page 24: ...tery 4 3 1 1 5V Source Power Supply Design Guidelines The desired output for the power supply is 3 8V hence there s not a big difference between the input source and the desired output and a linear re...

Page 25: ...s absorption In any case the frequency and Switching design selection is related to the application to be developed due to the fact the switching frequency could also generate EMC interferences For ca...

Page 26: ...n peaks a 100 F tantalum capacitor is usually suited Make sure the low ESR capacitor usually a tantalum one is rated at least 10V A protection diode should be inserted close to the power input in orde...

Page 27: ...lways the time to cool down between the paging cycles and the heat sink could be smaller than the calculated one for 300mA maximum RMS current or even could be the simple chip package no heat sink Mor...

Page 28: ...d the Bypass capacitor must be wide enough to ensure no significant voltage drops occur This is for the same reason as previous point Try to keep this trace as short as possible To reduce the EMI due...

Page 29: ...ng module sleep mode PSM mode The operating range characteristics of the supply are Item Min Typical Max Output voltage 1 7V 1 80V 1 9V Output current 50mA Output bypass capacitor inside the module 10...

Page 30: ...the network for a long time Additional hardware lines are defined to support this feature and to synchronize the activities with the external Host processor PIN DESCRIPTION Signal Function I O PAD LP...

Page 31: ...ent configuration is falling edge as shown in the application circuit below NOTE LP_WAKE has an internal pull up of 1M to VAUX 1 8V Placing an external pull up is not required and may result in a high...

Page 32: ...low level 0V 0 35V Output high level 1 42V 1 85V Output low level 0V 0 2V LEAKAGE CURRENT CHARACTERISTICS Parameter AVG Input leakage current 10uA Output leakage current 10uA DRIVE STRENGTH Parameter...

Page 33: ...BATT is applied to the module VAUX PWRMON pin will be then set at the high logic level The following flow chart shows the proper turn on procedure PWRMON ON Modem ON Proc START PWR Supply ON PWRMON ON...

Page 34: ...Rev 1 Page 34 of 72 2017 11 20 A flow chart showing the AT commands managing procedure is displayed below Start AT CMD START Delay 300 msec Enter AT CR Disconnect PWR Supply AT answer in 1 sec GO TO...

Page 35: ...l up resistor may bring to latch up problems on the NL865B1 power regulator and improper functioning of the module The line RESET must be connected only in open collector configuration the transistor...

Page 36: ...own below NOTE In order to avoid a back powering effect it is recommended to avoid having any HIGH logic level signal applied to the digital pins of the NL865B1 when the module is powered off or durin...

Page 37: ...ng effect it is recommended to avoid having any HIGH logic level signal applied to the digital pins of the NL865B1 when the module is powered OFF or during an ON OFF transition Using bidirectional lev...

Page 38: ...de any means of software driven shutdown In case that power off is required for example when modem is not used for a long time the below procedure should be followed in order to eliminate the posible...

Page 39: ...re a level translator circuit may be needed to make the system work On the NL865B1 the ports are CMOS 1 8 5 5 1 1 MODEM SERIAL PORT 1 The serial port 1 on the NL865B1 is a 1 8V UART with only 2 RS232...

Page 40: ...de will be connected to the transmit line here named RXD For a minimum implementation only the TXD RXD lines can be connected In order to avoid a back powering effect it is recommended to avoid having...

Page 41: ...PAD Signal I O Function Type NOTE 45 TX_AUX O Auxiliary UART TX Data to DTE CMOS 1 8V Main Debug logging port NOTE In order to avoid a back powering effect it is recommended to avoid having any HIGH l...

Page 42: ...of level translation is always required The simplest way to translate the levels and invert the signal is by using a single chip level translator There are a multitude of them differing in the number...

Page 43: ...The level translator IC outputs on the module side i e module inputs will cause damage to the module inputs if the level translator is powered by a 3 8V supply So the level translator IC must be powe...

Page 44: ...ending on the function implemented The following table shows the available GPIO on the NL865B1 PAD Signal I O Default State NOTE 42 GPIO_01 I O Input No Pull 41 GPIO_02 I O Input No Pull 40 GPIO_03 I...

Page 45: ...th an open collector transistor with a 47K pull up to VAUX Any of the GPIO s 1 8 can be used as an interrupt source User can configure the interrupt for either faling or rising edge Any of the GPIO s...

Page 46: ...mmand user guide for more information SIM Interface The NL865B1 supports a standard SIM card interface with the below exceptions 1 8V I O only 3V SIM is not supported SIM PIN SIM lock feature is not s...

Page 47: ...s able to read a voltage level in the range of 0 2 1 7 volts applied on the ADC pin input store and convert it into 10 bit word The input line is named as ADC_IN1 and it is available on Pad 13 The fol...

Page 48: ...NB IoT 108 2dBm NOTE For low data rates sensitivity will be better than 3GPP spec RED requirements NL865B1 meets RED requirement Article 10 item 8 NL865B1 has been assessed to be used with separation...

Page 49: ...s for a proper design The antenna and antenna transmission line on PCB for a Telit NL865B1 device shall fulfil the following requirements Item Value Frequency range Depending by frequency band s provi...

Page 50: ...the PCB used only for the Ground plane Surround on the sides over and under the antenna line on PCB with Ground avoid having other signal tracks facing directly the antenna line track The ground aroun...

Page 51: ...cro strip on the superficial copper layer for the antenna line the line attenuation will be lower than a buried one 6 5 3 Antenna installation Guidelines Install the antenna in a place covered by the...

Page 52: ...ICAL DESIGN Mechanical Dimensions The NL865B1 overall dimensions are Length 24 4 mm Width 24 4 mm Thickness 2 45 mm excluding Lable thikness Weight 2 5 gr 7 1 1 Mechanical Drawing 7 1 2 Top View The f...

Page 53: ...NL865B1 HW Design Guide 1VV0301450 Rev 1 Page 53 of 72 2017 11 20 7 1 3 Bottom View as seen from bottom side...

Page 54: ...NL865B1 HW Design Guide 1VV0301450 Rev 1 Page 54 of 72 2017 11 20 7 1 4 Side View 7 1 5 Module finishing dimensions...

Page 55: ...rint for the application Dimensions are in mm In order to easily rework the NL865B1 is suggested to consider on the application a 1 5 mm placement inhibit area around the module It is also suggested a...

Page 56: ...1 Page 56 of 72 2017 11 20 PCB pad design Non solder mask defined NSMD type is recommended for the solder pads on the PCB PCB pad dimensions The recommendation for the PCB pads dimensions are describ...

Page 57: ...high shear force values The PCB must be able to resist the higher temperatures which are occurring at the lead free process This issue should be discussed with the PCB supplier Generally the wettabili...

Page 58: ...3 C second max Preheat Temperature Min Tsmin Temperature Max Tsmax Time min to max ts 150 C 200 C 60 180 seconds Tsmax to TL Ramp up rate 3 C second max Time maintained above Temperature TL Time tL 2...

Page 59: ...roviding mechanical protection against transport stress In addition they are re usable and so environmentally sustainable There are 2 two antistatic rubber bands that enclose each envelope The carton...

Page 60: ...NL865B1 HW Design Guide 1VV0301450 Rev 1 Page 60 of 72 2017 11 20 Tray organization is shown in the figure below...

Page 61: ...NL865B1 HW Design Guide 1VV0301450 Rev 1 Page 61 of 72 2017 11 20 Tray Drawing WARNING These trays can withstand a maximum temperature of 125...

Page 62: ...1 HW Design Guide 1VV0301450 Rev 1 Page 62 of 72 2017 11 20 Tape Reel The NL865 modules are available on a T R packaging as well NL865B1 is packaged on reels of 200 pieces each as shown in the figure...

Page 63: ...the following conditions a Calculated shelf life in sealed bag 12 months at 40 C and 90 relative humidity RH b Environmental condition during the production 30 C 60 RH according to IPC JEDEC J STD 03...

Page 64: ...ITY ASSESSMENT ISSUES Declaration of Conformity Hereby Telit Communications S p A declares that the NB IOT Module is in compliance with Directive 2014 53 EU The full text of the EU declaration of conf...

Page 65: ...arefully the instruction for its use Do not insert or remove the SIM when the product is in power saving mode The system integrator is responsible for the functioning of the final product therefore ca...

Page 66: ...1900 B2 1850 1910 1930 1990 Tx 9262 9538 Rx 9662 9938 80 MHz WCDMA 1800 B3 1710 1785 1805 1880 Tx 937 1288 Rx 1162 1513 95 MHz WCDMA AWS B4 1710 1755 2110 2155 Tx 1312 1513 Rx 1537 1738 400 MHz WCDMA...

Page 67: ...B8 880 915 925 960 Tx 21450 21799 Rx 3450 3799 45 MHz LTE 1800 B9 1749 9 1784 9 1844 9 1879 9 Tx 21800 2149 Rx 3800 4149 95 MHz LTE AWS B10 1710 1770 2110 2170 Tx 22150 22749 Rx 4150 4749 400 MHz LTE...

Page 68: ...758 803 Tx 27210 27659 Rx 9210 9659 45 MHz LTE TDD 2600 B38 2570 2620 2570 2620 Tx 37750 38250 Rx 37750 38250 0 MHz LTE TDD 1900 B39 1880 1920 1880 1920 Tx 38250 38650 Rx 38250 38650 0 MHz LTE TDD 23...

Page 69: ...ss HSDPA High Speed Downlink Packet Access HSUPA High Speed Uplink Packet Access UART Universal Asynchronous Receiver Transmitter HSIC High Speed Inter Chip SIM Subscriber Identification Module SPI Se...

Page 70: ...Rev 1 Page 70 of 72 2017 11 20 SRDY Slave Ready CS Chip Select RTC Real Time Clock PCB Printed Circuit Board ESR Equivalent Series Resistance VSWR Voltage Standing Wave Radio VNA Vector Network Analy...

Page 71: ...0dBm Section 3 1 Updated description of PSM pins Section 4 2 Added clarification related to measured values Section 4 5 Added more info related to PSM signals Section 5 5 Updated Serial port 1 descrip...

Page 72: ...01 2017 Mod 0818 2017 01 Rev 0...

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