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LE915Ax-P
Hardware Design Guide
1VV0301680 Rev. 2
Page 26 of 51
2021-10-04
Not Subject to NDA
Figure 7: Typical level translator circuit
Warning: The digital input lines, operating at 1.8V CMOS levels, have
an absolute maximum input voltage of 3.6V. The IC outputs of the
level transducer on the side of the module (that is LE915Ax-P inputs)
will damage the inputs of the module if the level translator is also
powered with nominal power of 3.8V. Therefore, the IC of the level
translator must be powered by a ded1.8V power supply.
General Purpose I/O
The following table shows the available GPIO on the LE915Ax-P family:
Pin
Signal
I/O
Function description
16
GPIO_1
I/O
1.8V, 8mA
30
GPIO_2
I/O
1.8V, 4mA
71
GPIO_3
I/O
1.8V, 8mA
72
GPIO_4
I/O
1.8V, 8mA