� ���
..
iii
..J
,.
:I
IIJ
(/)
(/)
c(
0
....
0
A
8
c
E
F
3
4
5
CIRCUIT NOTES:
101. VOLTAGE; VOLTAGE RANGE:
+4.5V TO +5.5V
201. ALL RESISTORS 1/4 WATT AND RESISTANCE VALUE IN
OHMS , UNLESS OTHERWISE SPECIFIED.
�:'> JliiJSWER
410710
+SV
102. INTEGRATED CIRCUIT POWER CONNECTIONS:
MLA\2, C2, C7
MLBI ,C9
MLA21 85,86,811 ,CIO
MLB2,C6,CI3
MLAI3,CI,C5,CII
ML89,813
MLB4, C4
MLB3, 814
MLA IO
TYPE
PART
LOGIC GNO
TTL
7
TTL
339602 16
8
LOW POWER SCHOTTKY 474000 14
7
CMOS
202. ALL CAPACITOR VALUES IN MICROFARADS UNLESS
OTHERWISE SPECIFIED.
203. ---( INDICATES FEMALE TERMINAL
--7
INDICATES MALE TERMINAL
204.
LOGIC DESIGNATION:
�
4
---NUMBER INDICATES PACKAGE PIN
6
ODE INDICATES LOCATION ON CIRCUIT
CARD.
205. ;'�OM (32
X
8) IS NOT PART OF 410710. PROVIDED
liN
PROGRAMMED IN 430900 ANSWER BACK MOO. KIT.
MLBI2,C!2, 012
MLA4
MLAII
MONOLITHIC SILICON
BIPOLAR (SEE NOTE 20�)
LINEAR
474002
4 74004
474008
474161
404006
404202
404555
339600
335529
14
14
14
16
I 16
8
16
14
7 7
7 8
3 8
I 8
7
SWITCH PACK DESIGNATION:
03.
206 .
SWITCH OPTIONS:
SPAS
SW4
L-swtTCH NUMBER
DESIGNATION
FUNCTION
TCH STATE
g?��u\�D�C:�gs LOCATION ON
P•RITY BIT SENT
I
TO ENABLE FUNCTION)
EVEN
ON
8TH BIT MARK OFF OFF
PACK
207. GROUND DESIGNATION:
SW3
SW4
SPAS sw
s
SW6
SW7
sws
BLINO"ENQ:'FROM
AUX R-T
LOCAL COPY OF
ANSWER BACK
ANSWER BACK
ON ANSWER
INTERFACE UNIT
ANSWER BACK
ON HERE-IS
ANSWER BACK
ON ENQ.
ON
ON
ON
TDU-ON
ALL OTHERS-OFF
ON
ON
LOGIC GND.
7
208 . AT CUSTOMER ID ISSUE 2A:
A
•
STRAPS STI AND ST2 ADDED FOR
MANUFACTURING PURPOSES.
209. WAVEFORM DESIGNATION:
m=
MILLISECONDS
u=
MICP.OSECONOS
+4 8V
R4
RS RS
<<iWE
12
ROI
..J""::
·
+4 SV
4
TK 4 7K 4. 7K
ORO!
R03
+sv
·
swE
OV
13
II
....
lU'Yu
.
.
37 INB2 0R03 10
R02
R35
12
c�5
34 ICS
R04
:376K
POE 39 IPS ORD4 8
RO�
C312
.
+4.8V
+SV
T08 33 IOBB ORO� 7
R06
.o
+Sv
Sov
Tos 23 IDS ORDS 6
ROT
+i
....
I
TOI
26 IOBI OR07
M R
R32
4.TK
2
00 2
T02 27 IDB2 IXR 21
101
16 7
�g
I
Rl6
01
T03 29 083 OSO
CEPCET
3
I
36
NSB
330
02 4
T04 29 IDB4 I2SB
tO CPS
13 A3
03 5
TO�
30!085 lSI 20 RU
i1i
P3
Q3 II
12 A2 MLA4 04 6
TOG 3 1 !086 IRDA
18
III'B
�
..
"'"
" ..
�'
'"'
�· ·�
.
.
.
.
PI ML Ql 13
AO
OS
R27
MLB3 INBI 38
CLOCK
16X
1 4
7 9
+SV
UART
PO
a
A4
D
:OK
ROA 1 9
TTCP
CP
OOA
MR
TC
CIO
15
8
•
IRCP
+SV ENABLE
.01
+5;
3
L 4 4
IRDE
OTBMT 24 TEOC:
�
"
�
..
.
.
\7
,;1r
�.
...
·�
t
9
'-.
ov
MR CEP CET
12
ML
13 10 ML
(LAST CHAR +I)
c11
8
•
�
+5V;;t_M I
�"
·�- �,.
�
J301A
RIO
DATA
119
PE Ql
+5V
8
SEND
:
30 CPS
13
CP
5
6.8K
I
4
1
CPS
RD
SW4
,
.
I
I
+
sv
�
s
s
12 Mc'\. 11
17
I
OV
89
tv
M
C5
13 85
CAL 1"3 H5V OfF
I
' • ":!"
"
·'"
.•...
19
I
OV S
RSI
TERM. READY
I
OUPLEX(HALF/FULLI
,. '
'
"-<
I
AL
SPA5
RTS
I
3 I
3 SW3 14
1
2
1
15
I
TAU/TOU
READY
I
���3
6
RTSIAUX)
IK
I
OL
ON
I
I
6
I
I
I
I
2
I
DSI
1
Z
1
TW2
1
+12V
13
I
II
l
-12V
1
GOUN!
"J-HV
LOGIC GROUND
'
9
.
4
BACK CARD
ISSUE lAS. 2A
"ENQ"
H
"ENQ" DECODER
C I
L
12
COUNTER CLOCK
R31
1.0
R33
8 2K
+5V
SV
R3e
2.7M
+SV
R34
4.7K
1
RIGGER
�1.8
+SV
R26
680
9
.I
+5V
R30
IOK
ENQ
M
IOCPS
OV
OV 30CPS
MR
IXR
21
R31
IOK
C28
.I
+SV
Rl4
4.7K
+ SV
I
SWI.
SW2
I
1
1s
1s1
�P_!5
_______
j
R9
4.7K
:.)a
l
(TR
ON)
To+vsv
II
12
5 AN8sA.ilR
SPA5·
GRO
SW5
R29
IOK
+SV
-6
·7
e
8