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Glossary
VX1410A & VX1420A IntelliFrame Mainframe Instruction Manual
Glossary–7
Slot 0 Controller
See Slot 0 Module. Also see Resource Manager.
Slot 0 Module
A VXIbus device that provides the minimum VXIbus slot 0 services to slots
1 through 12 (CLK10 and the module identity lines), but that may provide
other services such as CLK100, SYNC100, STARBUS, and trigger control.
SMP
See Shared Memory Protocol.
STARX
Two (2) bi-directional, 50
W
, differential ECL lines that provide for
inter-module asynchronous communication. These pairs of timed and
matched delay lines connect slot 0 and each of slots 1 through 12 in a
mainframe. The delay between slots is less than 5 ns, and the lines are well
matched for timing skew.
STARY
Two (2) bi-directional, 50
W
, differential ECL lines that provide for
inter-module asynchronous communication. These pairs of timed and
matched delay lines connect slot 0 and each of slots 1 through 12 in a
mainframe. The delay between slots is less than 5 ns, and the lines are well
matched for timing skew.
STST
STart/STop protocol; used to synchronize modules.
Super Cooler
T
This is a IntelliFrame Mainframe with all the features of the VX1410A
mainframe, but with higher cooling capacity and very quiet operation.
SYNC100
A Slot 0 signal that is used to synchronize multiple devices with respect to a
given rising edge of CLK100. These signals are individually buffered and
matched to less than 2 ns of skew.
Synchronous Communications
A communications system that follows the “command-response” cycle
model. In this model, a device issues a command to another device; the
second device executes the command; then returns a response. Synchronous
commands are executed in the order received.
SYSFAIL*
A signal line on the VMEbus that is used to indicate a failure by a device.
The device that fails asserts this line.
System Clock Driver
A functional module that provides a 16 MHz timing signal on the Utility Bus.
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Summary of Contents for IntelliFrame VX1410A
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