PCI-934 Technical Reference Manual
8-6
8.3 PARALLEL
PORT
The PCI-934 provides a bi-directional parallel port, compatible with PC/XT, AT, PS/2,
EPP and ECP modes.
To operate in EPP or ECP mode, the peripheral must be designed to operate in this mode
and the BIOS setup must be configured to support it. The differences between the three
modes appear in their pin assignation.
The parallel port connector (J13) is a male 26-pin header located at the top right side of the
board.
The following list includes approved vendors for the J13 connector’s mating parts:
Amp 746285-6 [optional strain relief: 499252-3],
Robinson Nugent IDS-C26PK-TG,
Thomas & Betts 622-2630 [optional strain relief: 622-2641].
(Polarized IDC female socket connector).
D B25 Fem ale
C on ne cto r
D B25 Fe male
Co nnec to r
C ut Wire # 26
10''
Pin 1
13
1
2 5
14
Fe male
26-p in H ea de r
10'', Printer Port Flat Cable (150-172)
1 4
1 5
1 6
1 7
1 8
1 9
2 0
2 1
2 2
2 3
2 4
2 5
A UT OF D*
E RR O R*
IN IT*
S EL E CT IN *
GN D
GN D
GN D
GN D
GN D
GN D
GN D
GN D
P a ra lle l P or t P ino u t A c co rd in g to S tan d a rd M o d e
* Act ive low s ig nal
1
2
3
4
5
6
7
8
9
1 0
11
1 2
1 3
O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I
I
I
I
O
I
O
O
-
-
-
-
-
-
-
-
S T R OB E*
D0
D1
D2
D3
D4
D5
D6
D7
A C K*
B U SY
P E
S EL E CT
Pin #
Pin #
I/O
Si gnal
Signa l
I /O
14
15
16
17
18
19
20
21
22
23
24
25
D ATAS T RB *
N o t Use d
N o t Use d
*
GN D
GN D
GN D
GN D
GN D
GN D
GN D
GN D
A D D R S T R B
P a ra lle l P o rt P ino u t A c co rd in g to E P P M o de
* Ac tiv e low s ign al
1
2
3
4
5
6
7
8
9
10
11
12
13
O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I
I
-
-
O
-
-
O
-
-
-
-
-
-
-
-
W RIT E*
D 0
D 1
D 2
D 3
D 4
D 5
D 6
D 7
IN T R
W AIT *
N ot Used
N ot Used
Pin #
Pin #
I/O
Signa l
Signa l
I/ O
P a ralle l P o rt P in o ut A c c o rd in g to E C P M o de
* A ctive low s igna l
1
2
C om pa tible M ode
H ig h Spe ed Mo de
14
15
16
17
18
19
20
21
22
23
24
25
.
GN D
GN D
GN D
GN D
GN D
GN D
GN D
GN D
O
I
O
O
-
-
-
-
-
-
-
-
Pin #
S ignal
I/O
A U T O F D *
H O S TA C K
2
F A U LT *
P E R IP H R Q S T *
1
2
BU S Y
PE R IP H A C K
2
PE R R O R
AC K R E V E R S E
2
IN I T *
R E V E R S ER Q S T *
1
2
S E L E C T IN *
1, 2
1
2
3
4
5
6
7
8
9
1 0
11
1 2
1 3
O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I
I
I
I
ST RO BE *
D0
D1
D2
D3
D4
D5
D6
D7
AC K*
S E L EC T
Pi n #
I/O
Signa l
Summary of Contents for PCI-934
Page 23: ...6 Installing and Working with System Components CONNECTOR LOCATION...
Page 49: ...11 Setting Jumpers JUMPER LOCATION...
Page 54: ...MULTIMEDIA FEATURES 12 EXPLORING THE MULTIMEDIA CAPABILITY OF THE BOARD...
Page 67: ...SOFTWARE DESCRIPTION 13 BIOS SETUPS 14 UPDATING THE BIOS WITH UPGBIOS 15 VT100 MODE...
Page 89: ...B 1 B BOARD DIAGRAMS...
Page 90: ...Board Diagrams B 3 B 1 PCI 934 ASSEMBLY DIAGRAM TOP...
Page 91: ...Board Diagrams B 5 B 2 PCI 934 ASSEMBLY DIAGRAM BOTTOM...
Page 92: ...Board Diagrams B 7 B 3 PCI 934 CONFIGURATION DIAGRAM...
Page 93: ...Board Diagrams B 9 B 4 PCI 934 MECHANICAL DIAGRAM...