TC
TRK0
WGATA
WDATA
(ENDB1) ME3
(ENBL0) ME2
(CA2) SIDE
(CA1) STEP
(CA0) DIR
WE1
WE0
BGND
DS2
DS1
DS0
INDEX
DS3
DEM0
DEM1
TD0
TD1
XB
XA2(24MHz)
XA1(IN)
DGND
RESET
DMAAK
TCK
TMS
D
VDD(5V)
(SEL)HOLD
BGND
NC (LSTRB)
WPR
T
R
D
ATA
DKCG/READ
Y
(5V)A
VDD
LPF2
LPF1
A
GND
CGP2
CGP1
PCTYP1
PCTYP0
DR
V2
ENDKCG
DMARQ
IMT
(5V)DVDD
DGND
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
A2
A1
A0
CS
WR
RD
17
16
18
19
25
26
23
24
21 20
22
31
32
29
30
27
28
59
58
61
60
63 64
62
53
52
55
54
57
56
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
35
36
34
33
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
TC7S14FT85L
IC103
GND
VCC
1 2 3 4 5
D72070GF3BE
FLOPPY DISC
CONTROLLER
1
2
3
4
5
6
IP
E
MOT
DIR
STEP
WDT
7
8
9
10
WGA
TRK0
WPRT
RDT
TO
FDD
11
12
13
14
15
SIDE
DCH
+5D
E
E
CN101
C110
0.1
+5D
+5D
+5D
C117
0.1
+5D
C111
10P
C114
10P
C115
100P
C116
100P
R110
1M
R114
100
R101
1K
R108
47
X101
24MHz
Z104
47x4
Z103
47x4
Z102
47x4
Z101
1Kx4
ZC103
47P
ZC102
47P
ZC101
47P
C102
6.3V100
+5D
+5D
+5IP
+5IP2
SUSTAIN
C113
0.022
C112
1800P
C109
4700P
C107
0.033
C106
0.033
C105
0.1
R102
100
IP102
N10
R112
6.8K
C108
0.01
1
2
3
4
5
6
+5IP2 1
+5IP2 2
E 3
E
+5IP
DATA
SCK
E
CPRST
SUS
4
CN108
CN102
VCC
GND
Y2
A1
G1
G2
Y1
A2
1
2
3
4
8
7
6
5
VCC
GND
Y2
A1
G1
G2
Y1
A2
1
2
3
4
8
7
6
5
TC7WT241FU
DUAL 3 STATE
BUFFER
TC7WT241FU
+5D
IP101
N10
+5D
+5D
+3.3D
+5D
+5D
R134
4.7K
R103
47
R105
4.7K
R104
47
C103
47P
C104
47P
C101
0.1
R106
4.7K
R107
10K
R115
4.7K
R116
4.7K
R109
100
12
11
10
9
8
7
FRM
LOAD
CP
VDD
VSS
DOFF
CN104
6
5
4
3
2
1
D0
D1
D2
D3
VEE
VLCD
D
C
B
+5IP
C132
0.1
A
B
C
D
E
G
H
F
CP.GATE
TOC.SNS
CP.CLK
CP.DATA
+5D
R113
10K
Q101
UN511NTX
UN511NTX
Q102
Q103
UN5216TX
R111
1K
MAIN 2/4 CIRCUIT
A
SCHEMATIC DIAGRAM-6
DUAL 3 STATE
BUFFER
SCHMITT
TRIGGER
INVERTER
SX-PR1000 MAIN 2/4 SCHEMATIC DIAGRAM
Summary of Contents for SX-PR1000
Page 32: ...131 QMWG1047AA WHITE KEY G KEY 7 32 ...
Page 50: ...Q105 2SD601AQ TRANSISTOR 1 2SD0601AQ MAIN 50 ...
Page 53: ...R13 ERDS2FJ222 1 4W 2 2K 1 JACK2 53 ...
Page 59: ...59 ...
Page 62: ...62 ...
Page 63: ...63 ...
Page 64: ...64 ...
Page 65: ...19 PACKAGING 65 ...