PICO-IMX6UL-EMMC REV. A1. HARDWARE MANUAL
– VER 1.00 – MAR 28 2016
Page
36
of
54
3.12. Input Power Requirements
The PICO-IMX6UL-EMMC is designed to be driven with a single input power rail.
The power domain pins have to be connected as follow:
All GND pins have to be connected to the carrier board ground pane.
All VSYS pins should be connected to the main power source.
Table 22 - Input Power Signals
Power Rail
Nominal Input
Input Range
Maximum Input Ripple
VSYS (4 pin)
5V
+4.2V - +5.25V
±50 mV
3.12.1. Power Management Signals
The PICO-IMX6UL-EMMC has the following set of signals to control the system power states such as
the power-on and reset conditions. This enables the system designer to implement a fully ACPI
compliant system supporting system states.
Table 23 - Power Management Signals
PIN
CPU
BALL
CPU PAD NAME
Signal
V
I/O Description
E1_17
R8
ONOFF
SRC_RESET_B
3V3
I
Power ON button input
signal
E1_36
PMIC
RESET
RESET
1V8
I
Reset power signal
NOTE: Pin E1_36 is described in detail in
chapter 2.2. Power Management IC
of this manual
