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PICO-IMX6UL-EMMC REV. A1. HARDWARE MANUAL

– VER 1.00 – MAR 28 2016

Page

Table 9 - TTL Display Signal Description

PIN

CPU

BALL

CPU PAD NAME

Signal

I/O Description

X1_8

B16

LCD_DATA23

LCDIF_DATA23

3V3

LCD Pixel Data bit 23

X1_10

A14

LCD_DATA22

LCDIF_DATA22

3V3

LCD Pixel Data bit 22

X1_12

B14

LCD_DATA21

LCDIF_DATA21

3V3

LCD Pixel Data bit 21

X1_14

C14

LCD_DATA20

LCDIF_DATA20

3V3

LCD Pixel Data bit 20

X1_16

D14

LCD_DATA19

LCDIF_DATA19

3V3

LCD Pixel Data bit 19

X1_18

A13

LCD_DATA18

LCDIF_DATA18

3V3

LCD Pixel Data bit 18

X1_20

B13

LCD_DATA17

LCDIF_DATA17

3V3

LCD Pixel Data bit 17

X1_22

C13

LCD_DATA16

LCDIF_DATA16

3V3

LCD Pixel Data bit 16

X1_24

D13

LCD_DATA15

LCDIF_DATA15

3V3

LCD Pixel Data bit 15

X1_26

A12

LCD_DATA14

LCDIF_DATA14

3V3

LCD Pixel Data bit 14

X1_28

B12

LCD_DATA13

LCDIF_DATA13

3V3

LCD Pixel Data bit 13

X1_30

C12

LCD_DATA12

LCDIF_DATA12

3V3

LCD Pixel Data bit 12

X1_32

D12

LCD_DATA11

LCDIF_DATA11

3V3

LCD Pixel Data bit 11

X1_34

E12

LCD_DATA10

LCDIF_DATA10

3V3

LCD Pixel Data bit 10

X1_36

A11

LCD_DATA9

LCDIF_DATA9

3V3

LCD Pixel Data bit 9

X1_38

B11

LCD_DATA8

LCDIF_DATA8

3V3

LCD Pixel Data bit 8

X1_40

D11

LCD_DATA7

LCDIF_DATA7

3V3

LCD Pixel Data bit 7

X1_42

A10

LCD_DATA6

LCDIF_DATA6

3V3

LCD Pixel Data bit 6

X1_44

B10

LCD_DATA5

LCDIF_DATA5

3V3

LCD Pixel Data bit 5

X1_46

C10

LCD_DATA4

LCDIF_DATA4

3V3

LCD Pixel Data bit 4

X1_48

D10

LCD_DATA3

LCDIF_DATA3

3V3

LCD Pixel Data bit 3

X1_50

E10

LCD_DATA2

LCDIF_DATA2

3V3

LCD Pixel Data bit 2

X1_52

LCD_DATA1

LCDIF_DATA1

3V3

LCD Pixel Data bit 1

X1_54

LCD_DATA0

LCDIF_DATA0

3V3

LCD Pixel Data bit 0

X1_56

SNVS_TAMPER5

GPIO5_IO05

3V3

LCD backlight
enable/disable

X1_58

LCD_HSYNC

LCDIF_HSYNC

3V3

LCD Horizontal
Synchronization

X1_60

LCD_ENABLE

LCDIF_ENABLE

3V3

LCD dot enable pin signal

X1_62

LCD_VSYNC

LCDIF_VSYNC

3V3

LCD Vertical
Synchronization

X1_64

LCD_CLK

LCDIF_CLK

3V3

LCD Pixel Clock

X1_66

NAND_ALE

PWM3_OUT

3V3

LCD Backlight brightness
Control

X1_68

P14

JTAG_TMS

GPIO1_IO11

3V3

LCD Voltage On

Summary of Contents for PICO-IMX6UL-EMMC

Page 1: ...PICO IMX6UL EMMC PICO Compute Module with NXP i MX6Ultralite SoC REV A1 VER 1 00 March 28 2016...

Page 2: ...PICO IMX6UL EMMC REV A1 HARDWARE MANUAL VER 1 00 MAR 28 2016 Page 2 of 54 REVISION HISTORY Revision Date Originator Notes 1 00 March 28 2016 TechNexion Initial Public release...

Page 3: ...PICO Compute Module Connector Interfaces 24 3 1 Ethernet 24 3 2 Digital Display Sub System DSS or TTL Interface 25 3 3 Audio Interface 27 3 4 Universal Serial Bus USB Interface 28 3 5 CAN BUS Interfac...

Page 4: ...tible Displays 49 6 2 1 Multi Touch PCAP Displays 49 6 3 Accessories 50 6 3 1 EDMANTP150A138045D2450BK Pack Content 50 6 4 PICO Compute Module Product Ordering Part Numbers 51 6 4 1 Standard Part Numb...

Page 5: ...Description 26 Table 10 I2S Audio Signal Description 27 Table 11 USB Host Signal Description 28 Table 12 USB OTG Signal Description 28 Table 13 CAN Bus Signal Description 29 Table 14 UART Signal Descr...

Page 6: ...2 PICO IMX6UL EMMC Compatibility Chart 11 Figure 3 PICO IMX6UL EMMC Dimensional Drawing 12 Figure 4 PICO IMX6UL EMMC Top view 13 Figure 5 PICO IMX6UL EMMC Bottom view 13 Figure 6 NXP i MX6Ultralite Pr...

Page 7: ...NXP i MX6Ultralite ARM Cortex A7 The PICO IMX6UL EMMC provides an ideal building block that easily integrates with a wide range of target markets requiring compact cost effective with low power consu...

Page 8: ...ation Unauthorized modifications or attachments could damage the device and may violate regulations governing radio devices These suggestions apply equally to your device battery charger or any enhanc...

Page 9: ...r is encouraged to try to correct the interference by one or more of the following measures Reorient or relocate the receiving antenna Increase the separation between the equipment and receiver Connec...

Page 10: ...PICO IMX6UL EMMC REV A1 HARDWARE MANUAL VER 1 00 MAR 28 2016 Page 10 of 54 1 3 Block Diagram Figure 1 PICO IMX6UL EMMC Block Diagram...

Page 11: ...al provides a complete overview Figure 2 PICO IMX6UL EMMC Compatibility Chart Table 1 PICO Compatibility Overview Interface Description LAN 1 Fast Ethernet LVDS Not available HDMI Not available TTL Di...

Page 12: ...onal Drawing The PICO IMX6UL EMMC Compute Module is partly size compatible with Intel Edison and adds several additional I O expansion interfaces on an enlarged footprint 2D and 3D files can be obtain...

Page 13: ...cription Item Description 1 NXP i MX6Ultralite Processor 2 Memory IC 3 NXP PF300 Power Management IC 4 BCM4339 WiFi Bluetooth IC 5 Antenna connector Figure 5 PICO IMX6UL EMMC Bottom view Item Descript...

Page 14: ...ds of up to 528 MHz The device is composed of the following major subsystems o Single core ARM Cortex A7 MPCore Platform o 32 KBytes L1 Instruction Cache o 32 KBytes L1 Data Cache o Private Timer and...

Page 15: ...ON OFF Input from processor P9 SNVS_TA MPER4 gpio5 IO 4 mode5 INT 3V3 I PMIC Interupt Signal P8 POR_B src POR_B mode0 RESETBMC U 3V3 I PMIC Reset Signal U9 CCM_PM IC_STBY _REQ ccm PMIC_VSTB Y_REQ mod...

Page 16: ...are internally pipelined and 8 bit prefetched to achieve very high bandwidth SK Hynix memory features VDD VDDQ 1 35V 0 100 0 067V Fully differential clock inputs CK CK operation Differential Data Stro...

Page 17: ...d compatible to VDD VDDQ 1 5V 0 075V Differential bidirectional data strobe 8n bit prefetch architecture Differential clock inputs CK CK 8 internal banks Nominal and dynamic on die termination ODT for...

Page 18: ...tiple NAND technology transitions as well as features such as advanced power management scheme iNAND Ultra uses advanced Multi Level Cell MLC NAND flash technology enhanced by embedded flash managemen...

Page 19: ...Compliant with e MMC Specification Ver 4 4 4 41 4 5 Bus mode o High speed e MMC protocol o Provide variable clock frequencies of 0 200MHz o Ten wire bus clock 1 bit command 8 bit data bus and a hardwa...

Page 20: ...ATA2 mode0 eMMC_DATA2 3V3 I O MMC SDIO Data bit 2 A2 SD1_DATA3 usdhc1 DATA3 mode0 eMMC_DATA3 3V3 I O MMC SDIO Data bit 3 A3 NAND_READY_B usdhc1 DATA4 mode1 eMMC_DATA4 3V3 I O MMC SDIO Data bit 4 C5 NA...

Page 21: ...stomers who require embedded 802 11ac Wi Fi Bluetooth features The SIP module is based on Broadcom BCM4339 chipset which is a WiFi BT SOC The Radio architecture high integration MAC BB chip provide ex...

Page 22: ...Data bit 3 C8 NAND_WE_B usdhc2 CMD mode1 SDIO_CMD I O MMC SDIO Command D8 NAND_RE_B usdhc2 CLK mode1 SDIO_CLK I O MMC SDIO Clock C6 NAND_DATA04 gpio4 IO 6 mode5 WL_HOST_WAKE O General purpose interfa...

Page 23: ...M14 JTAG_TCK sai2 RX_DATA mode2 BT_PCM_OUT O PCM data output N16 JTAG_TDI sai2 TX_BCLK mode2 BT_PCM_CLK I O PCM clock N15 JTAG_TDO sai2 TX_SYNC mode2 BT_PCB_SYNC I O PCM sync signal N9 SNVS_TAMPER8 gp...

Page 24: ...ng at 2 5 25MHz o 4 bit non standard MII Lite MII without the CRS and COL signals operating at 2 5 25MHz o 2 bit Reduced MII RMII operating at 50MHz For additional details please refer to the 10 100 M...

Page 25: ...to source frame buffer data for display refresh This interface can also be used to drive data for Smart displays PIO interface to manage data transfers between Smart displays and SoC 8 16 18 24 32 bi...

Page 26: ...11 LCDIF_DATA11 3V3 O LCD Pixel Data bit 11 X1_34 E12 LCD_DATA10 LCDIF_DATA10 3V3 O LCD Pixel Data bit 10 X1_36 A11 LCD_DATA9 LCDIF_DATA9 3V3 O LCD Pixel Data bit 9 X1_38 B11 LCD_DATA8 LCDIF_DATA8 3V3...

Page 27: ...frame Asynchronous 32 32 bit FIFO for each transmit and receive channel Supports graceful restart after FIFO error For additional details please refer to the Synchronous Audio Interface SAI chapter of...

Page 28: ...nal Description PIN CPU BALL CPU PAD NAME Signal V I O Description X2_46 T13 USB_OTG2_DN USB_OTG2_DN 3V3 I O Universal Serial Bus differential pair negative signal X2_48 U13 USB_OTG2_DP USB_OTG2_DP 3V...

Page 29: ...and extended message frames 64 Message Buffers are supported FlexCAN supports the following main features Compliant with the CAN 2 0B protocol specification Programmable bit rate up to 1 Mb sec Integ...

Page 30: ...itional details please refer to the Universal Asynchronous Receiver Transmitter UART chapter of the i MX6Ultralite Application Processor Reference Manual Table 14 UART Signal Description PIN CPU BALL...

Page 31: ...olarity and phase of the Chip Select SS and SPI Clock SCLK are configurable Direct Memory Access DMA support Max operation frequency up to the reference clock frequency For additional details please r...

Page 32: ...er to the I2C Controller I2C chapter of the i MX6Ultralite Application Processor Reference Manual Table 16 I2 C Bus Signal Description PIN CPU BALL CPU PAD NAME Signal V I O Description E1_41 F17 UART...

Page 33: ...Ultralite Application Processor Reference Manual Table 17 GPIO Signal Description PIN CPU BALL CPU PAD NAME Signal V I O Description E1_24 F2 CSI_VSYNC GPIO4_IO19 1V8 I O General Purpose Input Output...

Page 34: ...ammed to be active in low power mode Can be programmed to be active in debug mode Interrupts at compare and rollover For additional details please refer to the Pulse Width Modulation PWM chapter of th...

Page 35: ...ATA13 BT_CFG13 1V8 I Boot Select pin X2_9 A12 LCD_DATA14 BT_CFG14 1V8 I Boot Select pin 3 11 1 Boot Modes The PICO IMX6UL EMMC Compute Module automatically boot from the internal eMMC if the above sig...

Page 36: ...t Input Range Maximum Input Ripple VSYS 4 pin 5V 4 2V 5 25V 50 mV 3 12 1 Power Management Signals The PICO IMX6UL EMMC has the following set of signals to control the system power states such as the p...

Page 37: ...e PICO carrier board For example the Maxim Integrated DS1337 connected over the general purpose I2C can be used Start Sequence VCC_RTC must come up at the same time or before VCC comes up Stop Sequenc...

Page 38: ...SB_OTG1_PWR 3V3 I USB OTG ID Pin E1_4 VSYS P System input power 4 0 to 5 25V E1_5 GND P Ground E1_6 VSYS P System input power 4 0 to 5 25V E1_7 NC Not Connected E1_8 3V3 P System 3 3V Output E1_9 GND...

Page 39: ...LK UART6_TX 1V8 O Universal Asynchronous Receive Transmit transmit data signal E1_28 E3 CSI_DATA01 GPIO4_IO22 1V8 I O General Purpose Input Output E1_29 NC Not Connected E1_30 E2 CSI_DATA02 GPIO4_IO23...

Page 40: ...rchip Sound I2S channel frame synchronization signal E1_55 J16 UART2_RXD ECSPI3_SCLK 1V8 O Serial Peripheral Interface clock signal E1_56 D1 CSI_DATA07 SAI1_TX_DATA 1V8 O Integrated Interchip Sound I2...

Page 41: ...it 15 X1_25 GND P Ground X1_26 A12 LCD_DATA14 LCDIF_DATA14 3V3 O LCD Pixel Data bit 14 X1_27 NC Not Connected X1_28 B12 LCD_DATA13 LCDIF_DATA13 3V3 O LCD Pixel Data bit 13 X1_29 NC Not Connected X1_30...

Page 42: ...3V3 O LCD Pixel Data bit 0 X1_55 NC Not Connected X1_56 N8 SNVS_TAMPER5 GPIO5_IO05 3V3 O LCD backlight enable disable X1_57 NC Not Connected X1_58 D9 LCD_HSYNC LCDIF_HSYNC 3V3 O LCD Horizontal Synchr...

Page 43: ...ND P Ground X2_18 NC Not Connected X2_19 F16 ENET1_RXD0 CAN1_TX 3V3 I O CAN controller Area Network transmit signal X2_20 GND P Ground X2_21 E17 ENET1_RXD1 CAN1_RX 3V3 I O CAN controller Area Network...

Page 44: ...S USB_OTG2_VBUS 5V I O Universal Serial Bus power X2_51 GND P Ground X2_52 R10 SNVS_TAMPER0 GPIO5_IO00 3V3 I Active low input to inform USB overcurrent condition low overcurrent detected X2_53 NC Not...

Page 45: ...1 CLK E1_37 J14 UART1_RTS uart1 RTS_B enet1 TX_ER usdhc1 CD_ B csi DATA 5 kpp COL 1 gpio1 IO 19 gpt1 CAPTU RE1 usdhc2 CD_ B E1_41 F17 UART5_TXD uart5 TX enet2 CRS i2c2 SCL csi DATA 14 kpp ROW 7 gpio1...

Page 46: ...ra pper TAMPE R 6 gpio5 IO 6 X1_40 D11 LCD_DATA0 7 lcdif DATA 7 pwm8 OUT ca7_platform TRACE 7 enet2 1588_ EVENT3_OU T spdif EXT_C LK gpio3 IO 12 src BT_CFG 7 ecspi1 SS3 X1_41 L16 GPIO1_IO07 enet1 MDC...

Page 47: ...O 2 enet1 1588_ EVENT1_IN uart1 TX X2_15 L17 GPIO1_IO03 i2c1 SDA gpt1 COMPA RE3 usb OTG2_O C osc32k 32K_ OUT usdhc1 CD_ B gpio1 IO 3 enet1 1588_ EVENT1_OU T uart1 RX X2_19 F16 ENET1_RXD 0 enet1 RDAT A...

Page 48: ...MC TechNexion has made available a large number of evaluation kits and accessories available 6 1 PICO IMX6UL EMMC Evaluation Kits 6 1 1 PICO Evaluation Start Kit Pack Content Partnumber Description PI...

Page 49: ...nits with PCAP multitouch touchsensor TLL Adaptor interface board Touch panel link cable Partnumber Description TDAT070TN94PCAPKIT 7 inch LVDS interface LCD display 800 480 resolution 350 nits with PC...

Page 50: ...1 HARDWARE MANUAL VER 1 00 MAR 28 2016 Page 50 of 54 6 3 Accessories 6 3 1 EDMANTP150A138045D2450BK Pack Content Partnumber Description EDMANTP150A138045D2450BK 4 5 dB 2 4 5 GHz black color antenna u...

Page 51: ...ded and industrial temperature options are available upon request 6 4 1 Standard Part Numbers Standard PICO IMX6UL EMMC System on Modules part numbers can be ordered in multiples of 10 units in the fo...

Page 52: ...6G205 R512 Exx BW xx xxxx Interface Code Description Processor G2 i MX6Ultralite Proccesor speed 05 528 Mhz Memory R256 256 MB DDR3L R512 512 MB DDR3L Storage Exx eMMC 4GB 04 8GB 08 16GB 16 32GB 32 Wi...

Page 53: ...patents or other intellectual property of the third party or a license from TechNexion under the patents or other intellectual property of TechNexion TechNexion products are not authorized for use in...

Page 54: ...in this publication To the extent permitted by law no liability including liability to any person by reason of negligence will be accepted by TechNexion Ltd its subsidiaries or employees for any dire...

Page 55: ...Mouser Electronics Authorized Distributor Click to View Pricing Inventory Delivery Lifecycle Information TechNexion PICO IMX6UL KIT...

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